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/*
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 * Copyright (c) 2018 naehrwert
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 * Copyright (c) 2019-2024 CTCaer
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms and conditions of the GNU General Public License,
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 * version 2, as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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 */
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#include <string.h>
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#include "emmc.h"
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#include <mem/heap.h>
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#include <soc/fuse.h>
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#include <storage/mbr_gpt.h>
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#include <utils/list.h>
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static u16 emmc_errors[3] = { 0 }; // Init and Read/Write errors.
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static u32 emmc_mode = EMMC_MMC_HS400;
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sdmmc_t emmc_sdmmc;
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sdmmc_storage_t emmc_storage;
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FATFS emmc_fs;
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#ifdef BDK_EMUMMC_ENABLE
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int emummc_storage_read(u32 sector, u32 num_sectors, void *buf);
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int emummc_storage_write(u32 sector, u32 num_sectors, void *buf);
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#endif
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void emmc_error_count_increment(u8 type)
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{
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	switch (type)
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	{
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	case EMMC_ERROR_INIT_FAIL:
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		emmc_errors[0]++;
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		break;
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	case EMMC_ERROR_RW_FAIL:
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		emmc_errors[1]++;
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		break;
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	case EMMC_ERROR_RW_RETRY:
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		emmc_errors[2]++;
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		break;
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	}
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}
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u16 *emmc_get_error_count()
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{
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	return emmc_errors;
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}
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u32 emmc_get_mode()
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{
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	return emmc_mode;
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}
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void emmc_end() { sdmmc_storage_end(&emmc_storage); }
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int emmc_init_retry(bool power_cycle)
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{
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	u32 bus_width = SDMMC_BUS_WIDTH_8;
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	u32 type = SDHCI_TIMING_MMC_HS400;
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	// Power cycle SD eMMC.
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	if (power_cycle)
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	{
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		emmc_mode--;
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		emmc_end();
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	}
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	// Get init parameters.
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	switch (emmc_mode)
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	{
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	case EMMC_INIT_FAIL: // Reset to max.
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		return 0;
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	case EMMC_1BIT_HS52:
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		bus_width = SDMMC_BUS_WIDTH_1;
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		type = SDHCI_TIMING_MMC_HS52;
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		break;
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	case EMMC_8BIT_HS52:
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		type = SDHCI_TIMING_MMC_HS52;
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		break;
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	case EMMC_MMC_HS200:
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		type = SDHCI_TIMING_MMC_HS200;
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		break;
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	case EMMC_MMC_HS400:
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		type = SDHCI_TIMING_MMC_HS400;
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		break;
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	default:
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		emmc_mode = EMMC_MMC_HS400;
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	}
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	return sdmmc_storage_init_mmc(&emmc_storage, &emmc_sdmmc, bus_width, type);
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}
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bool emmc_initialize(bool power_cycle)
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{
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	// Reset mode in case of previous failure.
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	if (emmc_mode == EMMC_INIT_FAIL)
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		emmc_mode = EMMC_MMC_HS400;
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	if (power_cycle)
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		emmc_end();
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	int res = !emmc_init_retry(false);
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	while (true)
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	{
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		if (!res)
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			return true;
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		else
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		{
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			emmc_errors[EMMC_ERROR_INIT_FAIL]++;
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			if (emmc_mode == EMMC_INIT_FAIL)
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				break;
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			else
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				res = !emmc_init_retry(true);
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		}
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	}
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	emmc_end();
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	return false;
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}
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int emmc_set_partition(u32 partition) { return sdmmc_storage_set_mmc_partition(&emmc_storage, partition); }
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void emmc_gpt_parse(link_t *gpt)
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{
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	gpt_t *gpt_buf = (gpt_t *)zalloc(GPT_NUM_BLOCKS * EMMC_BLOCKSIZE);
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#ifdef BDK_EMUMMC_ENABLE
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	emummc_storage_read(GPT_FIRST_LBA, GPT_NUM_BLOCKS, gpt_buf);
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#else
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	sdmmc_storage_read(&emmc_storage, GPT_FIRST_LBA, GPT_NUM_BLOCKS, gpt_buf);
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#endif
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	// Check if no GPT or more than max allowed entries.
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	if (memcmp(&gpt_buf->header.signature, "EFI PART", 8) || gpt_buf->header.num_part_ents > 128)
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		goto out;
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	for (u32 i = 0; i < gpt_buf->header.num_part_ents; i++)
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	{
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		emmc_part_t *part = (emmc_part_t *)zalloc(sizeof(emmc_part_t));
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		if (gpt_buf->entries[i].lba_start < gpt_buf->header.first_use_lba)
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			continue;
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		part->index     = i;
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		part->lba_start = gpt_buf->entries[i].lba_start;
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		part->lba_end   = gpt_buf->entries[i].lba_end;
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		part->attrs     = gpt_buf->entries[i].attrs;
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		// ASCII conversion. Copy only the LSByte of the UTF-16LE name.
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		for (u32 j = 0; j < 36; j++)
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			part->name[j] = gpt_buf->entries[i].name[j];
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		part->name[35] = 0;
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		list_append(gpt, &part->link);
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	}
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out:
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	free(gpt_buf);
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}
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void emmc_gpt_free(link_t *gpt)
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{
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	LIST_FOREACH_SAFE(iter, gpt)
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		free(CONTAINER_OF(iter, emmc_part_t, link));
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}
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emmc_part_t *emmc_part_find(link_t *gpt, const char *name)
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{
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	LIST_FOREACH_ENTRY(emmc_part_t, part, gpt, link)
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		if (!strcmp(part->name, name))
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			return part;
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	return NULL;
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}
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int emmc_part_read(emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf)
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{
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	// The last LBA is inclusive.
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	if (part->lba_start + sector_off > part->lba_end)
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		return 0;
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#ifdef BDK_EMUMMC_ENABLE
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	return emummc_storage_read(part->lba_start + sector_off, num_sectors, buf);
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#else
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	return sdmmc_storage_read(&emmc_storage, part->lba_start + sector_off, num_sectors, buf);
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#endif
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}
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int emmc_part_write(emmc_part_t *part, u32 sector_off, u32 num_sectors, void *buf)
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{
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	// The last LBA is inclusive.
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	if (part->lba_start + sector_off > part->lba_end)
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		return 0;
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#ifdef BDK_EMUMMC_ENABLE
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	return emummc_storage_write(part->lba_start + sector_off, num_sectors, buf);
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#else
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	return sdmmc_storage_write(&emmc_storage, part->lba_start + sector_off, num_sectors, buf);
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#endif
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}
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void nx_emmc_get_autorcm_masks(u8 *mod0, u8 *mod1)
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{
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	if (fuse_read_hw_state() == FUSE_NX_HW_STATE_PROD)
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	{
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		*mod0 = 0xF7;
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		*mod1 = 0x86;
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	}
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	else
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	{
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		*mod0 = 0x37;
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		*mod1 = 0x84;
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	}
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}
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