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/*
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 * Copyright (c) 2018 naehrwert
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 * Copyright (c) 2018-2025 CTCaer
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms and conditions of the GNU General Public License,
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 * version 2, as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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 */
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#ifndef _UTIL_H_
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#define _UTIL_H_
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#include <utils/types.h>
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#include <mem/minerva.h>
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#define NYX_NEW_INFO 0x3058594E
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typedef enum
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{
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	REBOOT_RCM,          // PMC reset. Enter RCM mode.
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	REBOOT_BYPASS_FUSES, // PMC reset via watchdog. Enter Normal mode. Bypass fuse programming in package1.
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	POWER_OFF,           // Power off PMIC. Do not reset regulators.
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	POWER_OFF_RESET,     // Power off PMIC. Reset regulators.
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	POWER_OFF_REBOOT,    // Power off PMIC. Reset regulators. Power on.
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} power_state_t;
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typedef enum
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{
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	NYX_CFG_UMS  = BIT(6),
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	NYX_CFG_EXTRA = 0xFF << 24
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} nyx_cfg_t;
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typedef enum
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{
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	ERR_LIBSYS_LP0 = BIT(0),
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	ERR_SYSOLD_NYX = BIT(1),
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	ERR_LIBSYS_MTC = BIT(2),
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	ERR_SD_BOOT_EN = BIT(3),
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	ERR_PANIC_CODE = BIT(4),
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	ERR_L4T_KERNEL = BIT(24),
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	ERR_EXCEPTION  = BIT(31),
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} hekate_errors_t;
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typedef struct _reg_cfg_t
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{
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	u32 idx;
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	u32 val;
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} reg_cfg_t;
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typedef struct _nyx_info_t
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{
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	u32 magic;
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	u32 sd_init;
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	u32 sd_errors[3];
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	u8  rsvd[0x1000];
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	u32 disp_id;
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	u32 errors;
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} nyx_info_t;
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typedef struct _nyx_storage_t
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{
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	u32 version;
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	u32 cfg;
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	u8  irama[0x8000];
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	u8  hekate[0x30000];
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	u8  rsvd[SZ_8M - sizeof(nyx_info_t)];
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	nyx_info_t info;
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	mtc_config_t mtc_cfg;
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	emc_table_t mtc_table[11]; // 10 + 1.
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} nyx_storage_t;
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u8   bit_count(u32 val);
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u32  bit_count_mask(u8 bits);
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char *strcpy_ns(char *dst, char *src);
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u64  sqrt64(u64 num);
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long strtol(const char *nptr, char **endptr, register int base);
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int  atoi(const char *nptr);
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void reg_write_array(u32 *base, const reg_cfg_t *cfg, u32 num_cfg);
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u32  crc32_calc(u32 crc, const u8 *buf, u32 len);
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int qsort_compare_int(const void *a, const void *b);
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int qsort_compare_char(const void *a, const void *b);
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int qsort_compare_char_case(const void *a, const void *b);
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void panic(u32 val);
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void power_set_state(power_state_t state);
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void power_set_state_ex(void *param);
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#endif
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