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CTCaer
GitHub Repository: CTCaer/hekate
 Path: blob/master/modules/hekate_libsys_lp0/pmc_lp0_t210.h
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/*

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 * Copyright (c) 2010-2015, NVIDIA CORPORATION.  All rights reserved.

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 *

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 * This program is free software; you can redistribute it and/or modify it

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 * under the terms and conditions of the GNU General Public License,

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 * version 2, as published by the Free Software Foundation.

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 *

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 * This program is distributed in the hope it will be useful, but WITHOUT

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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

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 * more details.

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 */

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#ifndef _TEGRA210_PMC_H_

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#define _TEGRA210_PMC_H_

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#include "types.h"

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struct tegra_pmc_regs

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{

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	u32 cntrl;

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	u32 sec_disable;

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	u32 pmc_swrst;

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	u32 wake_mask;

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	u32 wake_lvl;

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	u32 wake_status;

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	u32 sw_wake_status;

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	u32 dpd_pads_oride;

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	u32 dpd_sample;

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	u32 dpd_enable;

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	u32 pwrgate_timer_off;

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	u32 clamp_status;

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	u32 pwrgate_toggle;

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	u32 remove_clamping_cmd;

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	u32 pwrgate_status;

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	u32 pwrgood_timer;

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	u32 blink_timer;

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	u32 no_iopower;

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	u32 pwr_det;

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	u32 pwr_det_latch;

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	u32 scratch0;

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	u32 scratch1;

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	u32 scratch2;

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	u32 scratch3;

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	u32 scratch4;

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	u32 scratch5;

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	u32 scratch6;

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	u32 scratch7;

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	u32 scratch8;

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	u32 scratch9;

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	u32 scratch10;

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	u32 scratch11;

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	u32 scratch12;

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	u32 scratch13;

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	u32 scratch14;

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	u32 scratch15;

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	u32 scratch16;

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	u32 scratch17;

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	u32 scratch18;

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	u32 scratch19;

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	u32 odmdata;

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	u32 scratch21;

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	u32 scratch22;

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	u32 scratch23;

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	u32 secure_scratch0;

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	u32 secure_scratch1;

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	u32 secure_scratch2;

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	u32 secure_scratch3;

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	u32 secure_scratch4;

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	u32 secure_scratch5;

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	u32 cpupwrgood_timer;

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	u32 cpupwroff_timer;

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	u32 pg_mask;

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	u32 pg_mask_1;

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	u32 auto_wake_lvl;

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	u32 auto_wake_lvl_mask;

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	u32 wake_delay;

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	u32 pwr_det_val;

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	u32 ddr_pwr;

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	u32 usb_debounce_del;

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	u32 usb_a0;

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	u32 crypto_op;

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	u32 pllp_wb0_override;

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	u32 scratch24;

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	u32 scratch25;

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	u32 scratch26;

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	u32 scratch27;

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	u32 scratch28;

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	u32 scratch29;

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	u32 scratch30;

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	u32 scratch31;

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	u32 scratch32;

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	u32 scratch33;

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	u32 scratch34;

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	u32 scratch35;

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	u32 scratch36;

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	u32 scratch37;

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	u32 scratch38;

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	u32 scratch39;

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	u32 scratch40;

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	u32 scratch41;

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	u32 scratch42;

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	u32 bondout_mirror[3];

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	u32 sys_33v_en;

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	u32 bondout_mirror_access;

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	u32 gate;

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	u32 wake2_mask;

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	u32 wake2_lvl;

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	u32 wake2_status;

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	u32 sw_wake2_status;

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	u32 auto_wake2_lvl_mask;

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	u32 pg_mask_2;

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	u32 pg_mask_ce1;

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	u32 pg_mask_ce2;

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	u32 pg_mask_ce3;

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	u32 pwrgate_timer_ce[7];

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	u32 pcx_edpd_cntrl;

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	u32 osc_edpd_over;

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	u32 clk_out_cntrl;

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	u32 sata_pwrgt;

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	u32 sensor_ctrl;

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	u32 rst_status;

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	u32 io_dpd_req;

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	u32 io_dpd_status;

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	u32 io_dpd2_req;

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	u32 io_dpd2_status;

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	u32 sel_dpd_tim;

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	u32 vddp_sel;

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	u32 ddr_cfg;

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	u32 e_no_vttgen;

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	u8 _rsv0[4];

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	u32 pllm_wb0_override_freq;

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	u32 test_pwrgate;

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	u32 pwrgate_timer_mult;

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	u32 dis_sel_dpd;

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	u32 utmip_uhsic_triggers;

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	u32 utmip_uhsic_saved_state;

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	u32 utmip_pad_cfg;

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	u32 utmip_term_pad_cfg;

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	u32 utmip_uhsic_sleep_cfg;

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	u32 utmip_uhsic_sleepwalk_cfg;

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	u32 utmip_sleepwalk_p[3];

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	u32 uhsic_sleepwalk_p0;

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	u32 utmip_uhsic_status;

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	u32 utmip_uhsic_fake;

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	u32 bondout_mirror3[5 - 3];

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	u32 secure_scratch6;

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	u32 secure_scratch7;

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	u32 scratch43;

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	u32 scratch44;

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	u32 scratch45;

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	u32 scratch46;

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	u32 scratch47;

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	u32 scratch48;

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	u32 scratch49;

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	u32 scratch50;

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	u32 scratch51;

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	u32 scratch52;

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	u32 scratch53;

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	u32 scratch54;

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	u32 scratch55;

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	u32 scratch0_eco;

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	u32 por_dpd_ctrl;

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	u32 scratch2_eco;

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	u32 utmip_uhsic_line_wakeup;

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	u32 utmip_bias_master_cntrl;

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	u32 utmip_master_config;

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	u32 td_pwrgate_inter_part_timer;

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	u32 utmip_uhsic2_triggers;

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	u32 utmip_uhsic2_saved_state;

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	u32 utmip_uhsic2_sleep_cfg;

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	u32 utmip_uhsic2_sleepwalk_cfg;

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	u32 uhsic2_sleepwalk_p1;

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	u32 utmip_uhsic2_status;

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	u32 utmip_uhsic2_fake;

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	u32 utmip_uhsic2_line_wakeup;

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	u32 utmip_master2_config;

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	u32 utmip_uhsic_rpd_cfg;

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	u32 pg_mask_ce0;

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	u32 pg_mask3[5 - 3];

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	u32 pllm_wb0_override2;

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	u32 tsc_mult;

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	u32 cpu_vsense_override;

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	u32 glb_amap_cfg;

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	u32 sticky_bits;

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	u32 sec_disable2;

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	u32 weak_bias;

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	u32 reg_short;

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	u32 pg_mask_andor;

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	u8 _rsv1[0x2c];

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	u32 secure_scratch8;	/* offset 0x300 */

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	u32 secure_scratch9;

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	u32 secure_scratch10;

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	u32 secure_scratch11;

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	u32 secure_scratch12;

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	u32 secure_scratch13;

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	u32 secure_scratch14;

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	u32 secure_scratch15;

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	u32 secure_scratch16;

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	u32 secure_scratch17;

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	u32 secure_scratch18;

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	u32 secure_scratch19;

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	u32 secure_scratch20;

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	u32 secure_scratch21;

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	u32 secure_scratch22;

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	u32 secure_scratch23;

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	u32 secure_scratch24;

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	u32 secure_scratch25;

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	u32 secure_scratch26;

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	u32 secure_scratch27;

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	u32 secure_scratch28;

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	u32 secure_scratch29;

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	u32 secure_scratch30;

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	u32 secure_scratch31;

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	u32 secure_scratch32;

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	u32 secure_scratch33;

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	u32 secure_scratch34;

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	u32 secure_scratch35;

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	u32 secure_scratch36;

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	u32 secure_scratch37;

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	u32 secure_scratch38;

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	u32 secure_scratch39;

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	u32 secure_scratch40;

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	u32 secure_scratch41;

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	u32 secure_scratch42;

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	u32 secure_scratch43;

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	u32 secure_scratch44;

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	u32 secure_scratch45;

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	u32 secure_scratch46;

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	u32 secure_scratch47;

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	u32 secure_scratch48;

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	u32 secure_scratch49;

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	u32 secure_scratch50;

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	u32 secure_scratch51;

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	u32 secure_scratch52;

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	u32 secure_scratch53;

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	u32 secure_scratch54;

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	u32 secure_scratch55;

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	u32 secure_scratch56;

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	u32 secure_scratch57;

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	u32 secure_scratch58;

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	u32 secure_scratch59;

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	u32 secure_scratch60;

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	u32 secure_scratch61;

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	u32 secure_scratch62;

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	u32 secure_scratch63;

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	u32 secure_scratch64;

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	u32 secure_scratch65;

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	u32 secure_scratch66;

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	u32 secure_scratch67;

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	u32 secure_scratch68;

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	u32 secure_scratch69;

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	u32 secure_scratch70;

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	u32 secure_scratch71;

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	u32 secure_scratch72;

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	u32 secure_scratch73;

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	u32 secure_scratch74;

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	u32 secure_scratch75;

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	u32 secure_scratch76;

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	u32 secure_scratch77;

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	u32 secure_scratch78;

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	u32 secure_scratch79;

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	u32 _rsv0x420[8];

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	u32 cntrl2;			/* 0x440 */

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	u32 _rsv0x444[2];

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	u32 event_counter;	/* 0x44C */

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	u32 fuse_control;

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	u32 scratch1_eco;

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	u32 _rsv0x458[1];

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	u32 io_dpd3_req;	/* 0x45C */

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	u32 io_dpd3_status;

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	u32 io_dpd4_req;

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	u32 io_dpd4_status;

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	u32 _rsv0x46C[30];

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	u32 ddr_cntrl;		/* 0x4E4 */

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	u32 _rsv0x4E8[70];

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	u32 scratch56;		/* 0x600 */

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	u32 scratch57;

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	u32 scratch58;

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	u32 scratch59;

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	u32 scratch60;

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	u32 scratch61;

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	u32 scratch62;

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	u32 scratch63;

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	u32 scratch64;

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	u32 scratch65;

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	u32 scratch66;

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	u32 scratch67;

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	u32 scratch68;

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	u32 scratch69;

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	u32 scratch70;

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	u32 scratch71;

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	u32 scratch72;

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	u32 scratch73;

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	u32 scratch74;

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	u32 scratch75;

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	u32 scratch76;

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	u32 scratch77;

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	u32 scratch78;

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	u32 scratch79;

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	u32 scratch80;

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	u32 scratch81;

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	u32 scratch82;

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	u32 scratch83;

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	u32 scratch84;

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	u32 scratch85;

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	u32 scratch86;

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	u32 scratch87;

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	u32 scratch88;

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	u32 scratch89;

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	u32 scratch90;

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	u32 scratch91;

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	u32 scratch92;

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	u32 scratch93;

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	u32 scratch94;

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	u32 scratch95;

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	u32 scratch96;

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	u32 scratch97;

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	u32 scratch98;

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	u32 scratch99;

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	u32 scratch100;

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	u32 scratch101;

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	u32 scratch102;

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	u32 scratch103;

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	u32 scratch104;

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	u32 scratch105;

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	u32 scratch106;

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	u32 scratch107;

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	u32 scratch108;

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	u32 scratch109;

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	u32 scratch110;

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	u32 scratch111;

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	u32 scratch112;

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	u32 scratch113;

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	u32 scratch114;

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	u32 scratch115;

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	u32 scratch116;

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	u32 scratch117;

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	u32 scratch118;

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	u32 scratch119;

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	u32 scratch120;		/* 0x700 */

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	u32 scratch121;

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	u32 scratch122;

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	u32 scratch123;

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	u32 scratch124;

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	u32 scratch125;

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	u32 scratch126;

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	u32 scratch127;

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	u32 scratch128;

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	u32 scratch129;

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	u32 scratch130;

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	u32 scratch131;

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	u32 scratch132;

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	u32 scratch133;

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	u32 scratch134;

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	u32 scratch135;

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	u32 scratch136;

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	u32 scratch137;

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	u32 scratch138;

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	u32 scratch139;

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	u32 scratch140;

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	u32 scratch141;

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	u32 scratch142;

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	u32 scratch143;

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	u32 scratch144;

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	u32 scratch145;

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	u32 scratch146;

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	u32 scratch147;

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	u32 scratch148;

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	u32 scratch149;

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	u32 scratch150;

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	u32 scratch151;

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	u32 scratch152;

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	u32 scratch153;

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	u32 scratch154;

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	u32 scratch155;

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	u32 scratch156;

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	u32 scratch157;

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	u32 scratch158;

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	u32 scratch159;

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	u32 scratch160;

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	u32 scratch161;

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	u32 scratch162;

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	u32 scratch163;

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	u32 scratch164;

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	u32 scratch165;

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	u32 scratch166;

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	u32 scratch167;

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	u32 scratch168;

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	u32 scratch169;

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	u32 scratch170;

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	u32 scratch171;

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	u32 scratch172;

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	u32 scratch173;

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	u32 scratch174;

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	u32 scratch175;

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	u32 scratch176;

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	u32 scratch177;

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	u32 scratch178;

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	u32 scratch179;

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	u32 scratch180;

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	u32 scratch181;

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	u32 scratch182;

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	u32 scratch183;

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	u32 scratch184;

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	u32 scratch185;

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	u32 scratch186;

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	u32 scratch187;

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	u32 scratch188;

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	u32 scratch189;

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	u32 scratch190;

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	u32 scratch191;

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	u32 scratch192;

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	u32 scratch193;

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	u32 scratch194;

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	u32 scratch195;

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	u32 scratch196;

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	u32 scratch197;

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	u32 scratch198;

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	u32 scratch199;

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	u32 scratch200;

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	u32 scratch201;

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	u32 scratch202;

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	u32 scratch203;

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	u32 scratch204;

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	u32 scratch205;

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	u32 scratch206;

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	u32 scratch207;

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	u32 scratch208;

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	u32 scratch209;

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	u32 scratch210;

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	u32 scratch211;

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	u32 scratch212;

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	u32 scratch213;

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	u32 scratch214;

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	u32 scratch215;

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	u32 scratch216;

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	u32 scratch217;

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	u32 scratch218;

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	u32 scratch219;

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	u32 scratch220;

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	u32 scratch221;

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	u32 scratch222;

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	u32 scratch223;

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	u32 scratch224;

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	u32 scratch225;

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	u32 scratch226;

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	u32 scratch227;

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	u32 scratch228;

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	u32 scratch229;

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	u32 scratch230;

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	u32 scratch231;

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	u32 scratch232;

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	u32 scratch233;

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	u32 scratch234;

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	u32 scratch235;

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	u32 scratch236;

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	u32 scratch237;

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	u32 scratch238;

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	u32 scratch239;

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	u32 scratch240;

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	u32 scratch241;

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	u32 scratch242;

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	u32 scratch243;

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	u32 scratch244;

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	u32 scratch245;

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	u32 scratch246;

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	u32 scratch247;

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	u32 scratch248;

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	u32 scratch249;

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	u32 scratch250;

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	u32 scratch251;

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	u32 scratch252;

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	u32 scratch253;

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	u32 scratch254;

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	u32 scratch255;

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	u32 scratch256;

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	u32 scratch257;

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	u32 scratch258;

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	u32 scratch259;

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	u32 scratch260;

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	u32 scratch261;

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	u32 scratch262;

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	u32 scratch263;

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	u32 scratch264;

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	u32 scratch265;

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	u32 scratch266;

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	u32 scratch267;

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	u32 scratch268;

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	u32 scratch269;

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	u32 scratch270;

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	u32 scratch271;

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	u32 scratch272;

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	u32 scratch273;

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	u32 scratch274;

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	u32 scratch275;

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	u32 scratch276;

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	u32 scratch277;

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	u32 scratch278;

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	u32 scratch279;

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	u32 scratch280;

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	u32 scratch281;

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	u32 scratch282;

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	u32 scratch283;

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	u32 scratch284;

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	u32 scratch285;

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	u32 scratch286;

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	u32 scratch287;

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	u32 scratch288;

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	u32 scratch289;

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	u32 scratch290;

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	u32 scratch291;

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	u32 scratch292;

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	u32 scratch293;

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	u32 scratch294;

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	u32 scratch295;

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	u32 scratch296;

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	u32 scratch297;

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	u32 scratch298;

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	u32 scratch299;			/* 0x9CC */

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	u32 _rsv0x9D0[50];

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	u32 secure_scratch80;	/* 0xa98 */

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	u32 secure_scratch81;

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	u32 secure_scratch82;

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	u32 secure_scratch83;

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	u32 secure_scratch84;

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	u32 secure_scratch85;

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	u32 secure_scratch86;

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	u32 secure_scratch87;

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	u32 secure_scratch88;

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	u32 secure_scratch89;

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	u32 secure_scratch90;

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	u32 secure_scratch91;

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	u32 secure_scratch92;

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	u32 secure_scratch93;

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	u32 secure_scratch94;

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	u32 secure_scratch95;

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	u32 secure_scratch96;

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	u32 secure_scratch97;

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	u32 secure_scratch98;

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	u32 secure_scratch99;

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	u32 secure_scratch100;

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	u32 secure_scratch101;

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	u32 secure_scratch102;

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	u32 secure_scratch103;

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	u32 secure_scratch104;

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	u32 secure_scratch105;

548
	u32 secure_scratch106;

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	u32 secure_scratch107;

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	u32 secure_scratch108;

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	u32 secure_scratch109;

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	u32 secure_scratch110;

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	u32 secure_scratch111;

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	u32 secure_scratch112;

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	u32 secure_scratch113;

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	u32 secure_scratch114;

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	u32 secure_scratch115;

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	u32 secure_scratch116;

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	u32 secure_scratch117;

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	u32 secure_scratch118;

561
	u32 secure_scratch119;

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};

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#endif	/* _TEGRA210_PMC_H_ */

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