Path: blob/master/Documentation/devicetree/bindings/iio/adc/adi,ad7779.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1%YAML 1.22---3$id: http://devicetree.org/schemas/iio/adc/adi,ad7779.yaml#4$schema: http://devicetree.org/meta-schemas/core.yaml#56title: Analog Devices AD777X family 8-Channel, 24-Bit, Simultaneous Sampling ADCs78maintainers:9- Ramona Nechita <ramona.nechita@analog.com>1011description: |12The AD777X family consist of 8-channel, simultaneous sampling analog-to-13digital converter (ADC). Eight full Σ-Δ ADCs are on-chip. The14AD7771 provides an ultralow input current to allow direct sensor15connection. Each input channel has a programmable gain stage16allowing gains of 1, 2, 4, and 8 to map lower amplitude sensor17outputs into the full-scale ADC input range, maximizing the18dynamic range of the signal chain.1920https://www.analog.com/media/en/technical-documentation/data-sheets/ad7770.pdf21https://www.analog.com/media/en/technical-documentation/data-sheets/ad7771.pdf22https://www.analog.com/media/en/technical-documentation/data-sheets/ad7779.pdf2324$ref: /schemas/spi/spi-peripheral-props.yaml#2526properties:27compatible:28enum:29- adi,ad777030- adi,ad777131- adi,ad77793233reg:34maxItems: 13536'#address-cells':37const: 13839'#size-cells':40const: 04142clocks:43maxItems: 14445avdd1-supply:46description: Front-End analog supply AVDD1. Can be used as conversion ref.4748avdd2-supply:49description: AVDD2 Analog Supply from 2.2 V to 3.6 V.5051avdd4-supply:52description: AVDD4 SAR Analog Supply and Reference Source.5354interrupts:55minItems: 156items:57- description: |58adc_rdy: Interrupt line for DRDY signal which indicates the end of59conversion independently of the interface selected to read back the60Σ-∆ conversion.61- description: |62Alert: The chip includes self diagnostic features to guarantee the63correct operation. If an error is detected, the ALERT pin is pulled64high to generate an external interruption to the controller.6566interrupt-names:67minItems: 168maxItems: 269items:70enum:71- adc_rdy72- alert7374start-gpios:75description:76Pin that controls start synchronization pulse.77maxItems: 17879reset-gpios:80maxItems: 18182io-backends:83maxItems: 18485adi,num-lanes:86description:87Number of lanes on which the data is sent on the output when the data88output interface is used.89$ref: /schemas/types.yaml#/definitions/uint3290enum: [1, 2, 4]91default: 49293required:94- compatible95- reg96- clocks9798allOf:99- if:100not:101required:102- io-backends103then:104properties:105adi,num-lanes: false106107oneOf:108- required:109- interrupts110- required:111- io-backends112113unevaluatedProperties: false114115examples:116- |117#include <dt-bindings/gpio/gpio.h>118#include <dt-bindings/interrupt-controller/irq.h>119spi {120#address-cells = <1>;121#size-cells = <0>;122123adc@0 {124compatible = "adi,ad7779";125reg = <0>;126start-gpios = <&gpio0 87 GPIO_ACTIVE_LOW>;127reset-gpios = <&gpio0 93 GPIO_ACTIVE_LOW>;128interrupt-parent = <&intc>;129interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;130interrupt-names = "adc_rdy";131clocks = <&adc_clk>;132};133};134135- |136#include <dt-bindings/gpio/gpio.h>137spi {138#address-cells = <1>;139#size-cells = <0>;140141adc@0 {142compatible = "adi,ad7779";143reg = <0>;144start-gpios = <&gpio0 87 GPIO_ACTIVE_LOW>;145reset-gpios = <&gpio0 93 GPIO_ACTIVE_LOW>;146clocks = <&adc_clk>;147io-backends = <&iio_backend>;148adi,num-lanes = <4>;149};150};151...152153154