1
# SPDX-License-Identifier: GPL-2.0
2
%YAML 1.2
3
---
4
$id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml#
5
$schema: http://devicetree.org/meta-schemas/core.yaml#
6

7
title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers
8

9
maintainers:
10
  - Marcelo Schmitt <marcelo.schmitt@analog.com>
11
  - Nuno Sá <nuno.sa@analog.com>
12

13
description: |
14
  Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers
15
  https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf
16
  https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf
17

18
properties:
19
  compatible:
20
    enum:
21
      - adi,adf4371
22
      - adi,adf4372
23

24
  reg:
25
    maxItems: 1
26

27
  clocks:
28
    description:
29
      Definition of the external clock (see clock/clock-bindings.txt)
30
    maxItems: 1
31

32
  clock-names:
33
    description:
34
      Must be "clkin" if the input reference is single ended or "clkin-diff"
35
      if the input reference is differential.
36
    enum: [clkin, clkin-diff]
37

38
  adi,mute-till-lock-en:
39
    type: boolean
40
    description:
41
      If this property is present, then the supply current to RF8P and RF8N
42
      output stage will shut down until the ADF4371/ADF4372 achieves lock as
43
      measured by the digital lock detect circuitry.
44

45
required:
46
  - compatible
47
  - reg
48
  - clocks
49
  - clock-names
50

51
allOf:
52
  - $ref: /schemas/spi/spi-peripheral-props.yaml#
53

54
unevaluatedProperties: false
55

56
examples:
57
  - |
58
    spi {
59
        #address-cells = <1>;
60
        #size-cells = <0>;
61

62
        frequency@0 {
63
            compatible = "adi,adf4371";
64
            reg = <0>;
65
            spi-max-frequency = <1000000>;
66
            clocks = <&adf4371_clkin>;
67
            clock-names = "clkin";
68
        };
69
    };
70
...
71

72