1
// SPDX-License-Identifier: GPL-2.0-only
2
/*
3
 * Kernel-based Virtual Machine driver for Linux
4
 * cpuid support routines
5
 *
6
 * derived from arch/x86/kvm/x86.c
7
 *
8
 * Copyright 2011 Red Hat, Inc. and/or its affiliates.
9
 * Copyright IBM Corporation, 2008
10
 */
11
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12

13
#include <linux/kvm_host.h>
14
#include "linux/lockdep.h"
15
#include <linux/export.h>
16
#include <linux/vmalloc.h>
17
#include <linux/uaccess.h>
18
#include <linux/sched/stat.h>
19

20
#include <asm/processor.h>
21
#include <asm/user.h>
22
#include <asm/fpu/xstate.h>
23
#include <asm/sgx.h>
24
#include <asm/cpuid/api.h>
25
#include "cpuid.h"
26
#include "lapic.h"
27
#include "mmu.h"
28
#include "trace.h"
29
#include "pmu.h"
30
#include "xen.h"
31

32
/*
33
 * Unlike "struct cpuinfo_x86.x86_capability", kvm_cpu_caps doesn't need to be
34
 * aligned to sizeof(unsigned long) because it's not accessed via bitops.
35
 */
36
u32 kvm_cpu_caps[NR_KVM_CPU_CAPS] __read_mostly;
37
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_cpu_caps);
38

39
struct cpuid_xstate_sizes {
40
	u32 eax;
41
	u32 ebx;
42
	u32 ecx;
43
};
44

45
static struct cpuid_xstate_sizes xstate_sizes[XFEATURE_MAX] __ro_after_init;
46

47
void __init kvm_init_xstate_sizes(void)
48
{
49
	u32 ign;
50
	int i;
51

52
	for (i = XFEATURE_YMM; i < ARRAY_SIZE(xstate_sizes); i++) {
53
		struct cpuid_xstate_sizes *xs = &xstate_sizes[i];
54

55
		cpuid_count(0xD, i, &xs->eax, &xs->ebx, &xs->ecx, &ign);
56
	}
57
}
58

59
u32 xstate_required_size(u64 xstate_bv, bool compacted)
60
{
61
	u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
62
	int i;
63

64
	xstate_bv &= XFEATURE_MASK_EXTEND;
65
	for (i = XFEATURE_YMM; i < ARRAY_SIZE(xstate_sizes) && xstate_bv; i++) {
66
		struct cpuid_xstate_sizes *xs = &xstate_sizes[i];
67
		u32 offset;
68

69
		if (!(xstate_bv & BIT_ULL(i)))
70
			continue;
71

72
		/* ECX[1]: 64B alignment in compacted form */
73
		if (compacted)
74
			offset = (xs->ecx & 0x2) ? ALIGN(ret, 64) : ret;
75
		else
76
			offset = xs->ebx;
77
		ret = max(ret, offset + xs->eax);
78
		xstate_bv &= ~BIT_ULL(i);
79
	}
80

81
	return ret;
82
}
83

84
struct kvm_cpuid_entry2 *kvm_find_cpuid_entry2(
85
	struct kvm_cpuid_entry2 *entries, int nent, u32 function, u64 index)
86
{
87
	struct kvm_cpuid_entry2 *e;
88
	int i;
89

90
	/*
91
	 * KVM has a semi-arbitrary rule that querying the guest's CPUID model
92
	 * with IRQs disabled is disallowed.  The CPUID model can legitimately
93
	 * have over one hundred entries, i.e. the lookup is slow, and IRQs are
94
	 * typically disabled in KVM only when KVM is in a performance critical
95
	 * path, e.g. the core VM-Enter/VM-Exit run loop.  Nothing will break
96
	 * if this rule is violated, this assertion is purely to flag potential
97
	 * performance issues.  If this fires, consider moving the lookup out
98
	 * of the hotpath, e.g. by caching information during CPUID updates.
99
	 */
100
	lockdep_assert_irqs_enabled();
101

102
	for (i = 0; i < nent; i++) {
103
		e = &entries[i];
104

105
		if (e->function != function)
106
			continue;
107

108
		/*
109
		 * If the index isn't significant, use the first entry with a
110
		 * matching function.  It's userspace's responsibility to not
111
		 * provide "duplicate" entries in all cases.
112
		 */
113
		if (!(e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) || e->index == index)
114
			return e;
115

116

117
		/*
118
		 * Similarly, use the first matching entry if KVM is doing a
119
		 * lookup (as opposed to emulating CPUID) for a function that's
120
		 * architecturally defined as not having a significant index.
121
		 */
122
		if (index == KVM_CPUID_INDEX_NOT_SIGNIFICANT) {
123
			/*
124
			 * Direct lookups from KVM should not diverge from what
125
			 * KVM defines internally (the architectural behavior).
126
			 */
127
			WARN_ON_ONCE(cpuid_function_is_indexed(function));
128
			return e;
129
		}
130
	}
131

132
	return NULL;
133
}
134
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_find_cpuid_entry2);
135

136
static int kvm_check_cpuid(struct kvm_vcpu *vcpu)
137
{
138
	struct kvm_cpuid_entry2 *best;
139
	u64 xfeatures;
140

141
	/*
142
	 * The existing code assumes virtual address is 48-bit or 57-bit in the
143
	 * canonical address checks; exit if it is ever changed.
144
	 */
145
	best = kvm_find_cpuid_entry(vcpu, 0x80000008);
146
	if (best) {
147
		int vaddr_bits = (best->eax & 0xff00) >> 8;
148

149
		if (vaddr_bits != 48 && vaddr_bits != 57 && vaddr_bits != 0)
150
			return -EINVAL;
151
	}
152

153
	/*
154
	 * Exposing dynamic xfeatures to the guest requires additional
155
	 * enabling in the FPU, e.g. to expand the guest XSAVE state size.
156
	 */
157
	best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0);
158
	if (!best)
159
		return 0;
160

161
	xfeatures = best->eax | ((u64)best->edx << 32);
162
	xfeatures &= XFEATURE_MASK_USER_DYNAMIC;
163
	if (!xfeatures)
164
		return 0;
165

166
	return fpu_enable_guest_xfd_features(&vcpu->arch.guest_fpu, xfeatures);
167
}
168

169
static u32 kvm_apply_cpuid_pv_features_quirk(struct kvm_vcpu *vcpu);
170
static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu);
171

172
/* Check whether the supplied CPUID data is equal to what is already set for the vCPU. */
173
static int kvm_cpuid_check_equal(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
174
				 int nent)
175
{
176
	struct kvm_cpuid_entry2 *orig;
177
	int i;
178

179
	/*
180
	 * Apply runtime CPUID updates to the incoming CPUID entries to avoid
181
	 * false positives due mismatches on KVM-owned feature flags.
182
	 *
183
	 * Note!  @e2 and @nent track the _old_ CPUID entries!
184
	 */
185
	kvm_update_cpuid_runtime(vcpu);
186
	kvm_apply_cpuid_pv_features_quirk(vcpu);
187

188
	if (nent != vcpu->arch.cpuid_nent)
189
		return -EINVAL;
190

191
	for (i = 0; i < nent; i++) {
192
		orig = &vcpu->arch.cpuid_entries[i];
193
		if (e2[i].function != orig->function ||
194
		    e2[i].index != orig->index ||
195
		    e2[i].flags != orig->flags ||
196
		    e2[i].eax != orig->eax || e2[i].ebx != orig->ebx ||
197
		    e2[i].ecx != orig->ecx || e2[i].edx != orig->edx)
198
			return -EINVAL;
199
	}
200

201
	return 0;
202
}
203

204
static struct kvm_hypervisor_cpuid kvm_get_hypervisor_cpuid(struct kvm_vcpu *vcpu,
205
							    const char *sig)
206
{
207
	struct kvm_hypervisor_cpuid cpuid = {};
208
	struct kvm_cpuid_entry2 *entry;
209
	u32 base;
210

211
	for_each_possible_cpuid_base_hypervisor(base) {
212
		entry = kvm_find_cpuid_entry(vcpu, base);
213

214
		if (entry) {
215
			u32 signature[3];
216

217
			signature[0] = entry->ebx;
218
			signature[1] = entry->ecx;
219
			signature[2] = entry->edx;
220

221
			if (!memcmp(signature, sig, sizeof(signature))) {
222
				cpuid.base = base;
223
				cpuid.limit = entry->eax;
224
				break;
225
			}
226
		}
227
	}
228

229
	return cpuid;
230
}
231

232
static u32 kvm_apply_cpuid_pv_features_quirk(struct kvm_vcpu *vcpu)
233
{
234
	struct kvm_hypervisor_cpuid kvm_cpuid;
235
	struct kvm_cpuid_entry2 *best;
236

237
	kvm_cpuid = kvm_get_hypervisor_cpuid(vcpu, KVM_SIGNATURE);
238
	if (!kvm_cpuid.base)
239
		return 0;
240

241
	best = kvm_find_cpuid_entry(vcpu, kvm_cpuid.base | KVM_CPUID_FEATURES);
242
	if (!best)
243
		return 0;
244

245
	if (kvm_hlt_in_guest(vcpu->kvm))
246
		best->eax &= ~(1 << KVM_FEATURE_PV_UNHALT);
247

248
	return best->eax;
249
}
250

251
/*
252
 * Calculate guest's supported XCR0 taking into account guest CPUID data and
253
 * KVM's supported XCR0 (comprised of host's XCR0 and KVM_SUPPORTED_XCR0).
254
 */
255
static u64 cpuid_get_supported_xcr0(struct kvm_vcpu *vcpu)
256
{
257
	struct kvm_cpuid_entry2 *best;
258

259
	best = kvm_find_cpuid_entry_index(vcpu, 0xd, 0);
260
	if (!best)
261
		return 0;
262

263
	return (best->eax | ((u64)best->edx << 32)) & kvm_caps.supported_xcr0;
264
}
265

266
static u64 cpuid_get_supported_xss(struct kvm_vcpu *vcpu)
267
{
268
	struct kvm_cpuid_entry2 *best;
269

270
	best = kvm_find_cpuid_entry_index(vcpu, 0xd, 1);
271
	if (!best)
272
		return 0;
273

274
	return (best->ecx | ((u64)best->edx << 32)) & kvm_caps.supported_xss;
275
}
276

277
static __always_inline void kvm_update_feature_runtime(struct kvm_vcpu *vcpu,
278
						       struct kvm_cpuid_entry2 *entry,
279
						       unsigned int x86_feature,
280
						       bool has_feature)
281
{
282
	cpuid_entry_change(entry, x86_feature, has_feature);
283
	guest_cpu_cap_change(vcpu, x86_feature, has_feature);
284
}
285

286
static void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
287
{
288
	struct kvm_cpuid_entry2 *best;
289

290
	vcpu->arch.cpuid_dynamic_bits_dirty = false;
291

292
	best = kvm_find_cpuid_entry(vcpu, 1);
293
	if (best) {
294
		kvm_update_feature_runtime(vcpu, best, X86_FEATURE_OSXSAVE,
295
					   kvm_is_cr4_bit_set(vcpu, X86_CR4_OSXSAVE));
296

297
		kvm_update_feature_runtime(vcpu, best, X86_FEATURE_APIC,
298
					   vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE);
299

300
		if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT))
301
			kvm_update_feature_runtime(vcpu, best, X86_FEATURE_MWAIT,
302
						   vcpu->arch.ia32_misc_enable_msr &
303
						   MSR_IA32_MISC_ENABLE_MWAIT);
304
	}
305

306
	best = kvm_find_cpuid_entry_index(vcpu, 7, 0);
307
	if (best)
308
		kvm_update_feature_runtime(vcpu, best, X86_FEATURE_OSPKE,
309
					   kvm_is_cr4_bit_set(vcpu, X86_CR4_PKE));
310

311

312
	best = kvm_find_cpuid_entry_index(vcpu, 0xD, 0);
313
	if (best)
314
		best->ebx = xstate_required_size(vcpu->arch.xcr0, false);
315

316
	best = kvm_find_cpuid_entry_index(vcpu, 0xD, 1);
317
	if (best && (cpuid_entry_has(best, X86_FEATURE_XSAVES) ||
318
		     cpuid_entry_has(best, X86_FEATURE_XSAVEC)))
319
		best->ebx = xstate_required_size(vcpu->arch.xcr0 |
320
						 vcpu->arch.ia32_xss, true);
321
}
322

323
static bool kvm_cpuid_has_hyperv(struct kvm_vcpu *vcpu)
324
{
325
#ifdef CONFIG_KVM_HYPERV
326
	struct kvm_cpuid_entry2 *entry;
327

328
	entry = kvm_find_cpuid_entry(vcpu, HYPERV_CPUID_INTERFACE);
329
	return entry && entry->eax == HYPERV_CPUID_SIGNATURE_EAX;
330
#else
331
	return false;
332
#endif
333
}
334

335
static bool guest_cpuid_is_amd_or_hygon(struct kvm_vcpu *vcpu)
336
{
337
	struct kvm_cpuid_entry2 *entry;
338

339
	entry = kvm_find_cpuid_entry(vcpu, 0);
340
	if (!entry)
341
		return false;
342

343
	return is_guest_vendor_amd(entry->ebx, entry->ecx, entry->edx) ||
344
	       is_guest_vendor_hygon(entry->ebx, entry->ecx, entry->edx);
345
}
346

347
/*
348
 * This isn't truly "unsafe", but except for the cpu_caps initialization code,
349
 * all register lookups should use __cpuid_entry_get_reg(), which provides
350
 * compile-time validation of the input.
351
 */
352
static u32 cpuid_get_reg_unsafe(struct kvm_cpuid_entry2 *entry, u32 reg)
353
{
354
	switch (reg) {
355
	case CPUID_EAX:
356
		return entry->eax;
357
	case CPUID_EBX:
358
		return entry->ebx;
359
	case CPUID_ECX:
360
		return entry->ecx;
361
	case CPUID_EDX:
362
		return entry->edx;
363
	default:
364
		WARN_ON_ONCE(1);
365
		return 0;
366
	}
367
}
368

369
static int cpuid_func_emulated(struct kvm_cpuid_entry2 *entry, u32 func,
370
			       bool include_partially_emulated);
371

372
void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
373
{
374
	struct kvm_lapic *apic = vcpu->arch.apic;
375
	struct kvm_cpuid_entry2 *best;
376
	struct kvm_cpuid_entry2 *entry;
377
	bool allow_gbpages;
378
	int i;
379

380
	memset(vcpu->arch.cpu_caps, 0, sizeof(vcpu->arch.cpu_caps));
381
	BUILD_BUG_ON(ARRAY_SIZE(reverse_cpuid) != NR_KVM_CPU_CAPS);
382

383
	/*
384
	 * Reset guest capabilities to userspace's guest CPUID definition, i.e.
385
	 * honor userspace's definition for features that don't require KVM or
386
	 * hardware management/support (or that KVM simply doesn't care about).
387
	 */
388
	for (i = 0; i < NR_KVM_CPU_CAPS; i++) {
389
		const struct cpuid_reg cpuid = reverse_cpuid[i];
390
		struct kvm_cpuid_entry2 emulated;
391

392
		if (!cpuid.function)
393
			continue;
394

395
		entry = kvm_find_cpuid_entry_index(vcpu, cpuid.function, cpuid.index);
396
		if (!entry)
397
			continue;
398

399
		cpuid_func_emulated(&emulated, cpuid.function, true);
400

401
		/*
402
		 * A vCPU has a feature if it's supported by KVM and is enabled
403
		 * in guest CPUID.  Note, this includes features that are
404
		 * supported by KVM but aren't advertised to userspace!
405
		 */
406
		vcpu->arch.cpu_caps[i] = kvm_cpu_caps[i] |
407
					 cpuid_get_reg_unsafe(&emulated, cpuid.reg);
408
		vcpu->arch.cpu_caps[i] &= cpuid_get_reg_unsafe(entry, cpuid.reg);
409
	}
410

411
	kvm_update_cpuid_runtime(vcpu);
412

413
	/*
414
	 * If TDP is enabled, let the guest use GBPAGES if they're supported in
415
	 * hardware.  The hardware page walker doesn't let KVM disable GBPAGES,
416
	 * i.e. won't treat them as reserved, and KVM doesn't redo the GVA->GPA
417
	 * walk for performance and complexity reasons.  Not to mention KVM
418
	 * _can't_ solve the problem because GVA->GPA walks aren't visible to
419
	 * KVM once a TDP translation is installed.  Mimic hardware behavior so
420
	 * that KVM's is at least consistent, i.e. doesn't randomly inject #PF.
421
	 * If TDP is disabled, honor *only* guest CPUID as KVM has full control
422
	 * and can install smaller shadow pages if the host lacks 1GiB support.
423
	 */
424
	allow_gbpages = tdp_enabled ? boot_cpu_has(X86_FEATURE_GBPAGES) :
425
				      guest_cpu_cap_has(vcpu, X86_FEATURE_GBPAGES);
426
	guest_cpu_cap_change(vcpu, X86_FEATURE_GBPAGES, allow_gbpages);
427

428
	best = kvm_find_cpuid_entry(vcpu, 1);
429
	if (best && apic) {
430
		if (cpuid_entry_has(best, X86_FEATURE_TSC_DEADLINE_TIMER))
431
			apic->lapic_timer.timer_mode_mask = 3 << 17;
432
		else
433
			apic->lapic_timer.timer_mode_mask = 1 << 17;
434

435
		kvm_apic_set_version(vcpu);
436
	}
437

438
	vcpu->arch.guest_supported_xcr0 = cpuid_get_supported_xcr0(vcpu);
439
	vcpu->arch.guest_supported_xss = cpuid_get_supported_xss(vcpu);
440

441
	vcpu->arch.pv_cpuid.features = kvm_apply_cpuid_pv_features_quirk(vcpu);
442

443
	vcpu->arch.is_amd_compatible = guest_cpuid_is_amd_or_hygon(vcpu);
444
	vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
445
	vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
446

447
	kvm_pmu_refresh(vcpu);
448

449
#define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
450
	vcpu->arch.cr4_guest_rsvd_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_) |
451
					 __cr4_reserved_bits(guest_cpu_cap_has, vcpu);
452
#undef __kvm_cpu_cap_has
453

454
	kvm_hv_set_cpuid(vcpu, kvm_cpuid_has_hyperv(vcpu));
455

456
	/* Invoke the vendor callback only after the above state is updated. */
457
	kvm_x86_call(vcpu_after_set_cpuid)(vcpu);
458

459
	/*
460
	 * Except for the MMU, which needs to do its thing any vendor specific
461
	 * adjustments to the reserved GPA bits.
462
	 */
463
	kvm_mmu_after_set_cpuid(vcpu);
464

465
	kvm_make_request(KVM_REQ_RECALC_INTERCEPTS, vcpu);
466
}
467

468
int cpuid_query_maxphyaddr(struct kvm_vcpu *vcpu)
469
{
470
	struct kvm_cpuid_entry2 *best;
471

472
	best = kvm_find_cpuid_entry(vcpu, 0x80000000);
473
	if (!best || best->eax < 0x80000008)
474
		goto not_found;
475
	best = kvm_find_cpuid_entry(vcpu, 0x80000008);
476
	if (best)
477
		return best->eax & 0xff;
478
not_found:
479
	return 36;
480
}
481

482
int cpuid_query_maxguestphyaddr(struct kvm_vcpu *vcpu)
483
{
484
	struct kvm_cpuid_entry2 *best;
485

486
	best = kvm_find_cpuid_entry(vcpu, 0x80000000);
487
	if (!best || best->eax < 0x80000008)
488
		goto not_found;
489
	best = kvm_find_cpuid_entry(vcpu, 0x80000008);
490
	if (best)
491
		return (best->eax >> 16) & 0xff;
492
not_found:
493
	return 0;
494
}
495

496
/*
497
 * This "raw" version returns the reserved GPA bits without any adjustments for
498
 * encryption technologies that usurp bits.  The raw mask should be used if and
499
 * only if hardware does _not_ strip the usurped bits, e.g. in virtual MTRRs.
500
 */
501
u64 kvm_vcpu_reserved_gpa_bits_raw(struct kvm_vcpu *vcpu)
502
{
503
	return rsvd_bits(cpuid_maxphyaddr(vcpu), 63);
504
}
505

506
static int kvm_set_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *e2,
507
                        int nent)
508
{
509
	u32 vcpu_caps[NR_KVM_CPU_CAPS];
510
	int r;
511

512
	/*
513
	 * Swap the existing (old) entries with the incoming (new) entries in
514
	 * order to massage the new entries, e.g. to account for dynamic bits
515
	 * that KVM controls, without clobbering the current guest CPUID, which
516
	 * KVM needs to preserve in order to unwind on failure.
517
	 *
518
	 * Similarly, save the vCPU's current cpu_caps so that the capabilities
519
	 * can be updated alongside the CPUID entries when performing runtime
520
	 * updates.  Full initialization is done if and only if the vCPU hasn't
521
	 * run, i.e. only if userspace is potentially changing CPUID features.
522
	 */
523
	swap(vcpu->arch.cpuid_entries, e2);
524
	swap(vcpu->arch.cpuid_nent, nent);
525

526
	memcpy(vcpu_caps, vcpu->arch.cpu_caps, sizeof(vcpu_caps));
527
	BUILD_BUG_ON(sizeof(vcpu_caps) != sizeof(vcpu->arch.cpu_caps));
528

529
	/*
530
	 * KVM does not correctly handle changing guest CPUID after KVM_RUN, as
531
	 * MAXPHYADDR, GBPAGES support, AMD reserved bit behavior, etc.. aren't
532
	 * tracked in kvm_mmu_page_role.  As a result, KVM may miss guest page
533
	 * faults due to reusing SPs/SPTEs. In practice no sane VMM mucks with
534
	 * the core vCPU model on the fly. It would've been better to forbid any
535
	 * KVM_SET_CPUID{,2} calls after KVM_RUN altogether but unfortunately
536
	 * some VMMs (e.g. QEMU) reuse vCPU fds for CPU hotplug/unplug and do
537
	 * KVM_SET_CPUID{,2} again. To support this legacy behavior, check
538
	 * whether the supplied CPUID data is equal to what's already set.
539
	 */
540
	if (kvm_vcpu_has_run(vcpu)) {
541
		r = kvm_cpuid_check_equal(vcpu, e2, nent);
542
		if (r)
543
			goto err;
544
		goto success;
545
	}
546

547
#ifdef CONFIG_KVM_HYPERV
548
	if (kvm_cpuid_has_hyperv(vcpu)) {
549
		r = kvm_hv_vcpu_init(vcpu);
550
		if (r)
551
			goto err;
552
	}
553
#endif
554

555
	r = kvm_check_cpuid(vcpu);
556
	if (r)
557
		goto err;
558

559
#ifdef CONFIG_KVM_XEN
560
	vcpu->arch.xen.cpuid = kvm_get_hypervisor_cpuid(vcpu, XEN_SIGNATURE);
561
#endif
562
	kvm_vcpu_after_set_cpuid(vcpu);
563

564
success:
565
	kvfree(e2);
566
	return 0;
567

568
err:
569
	memcpy(vcpu->arch.cpu_caps, vcpu_caps, sizeof(vcpu_caps));
570
	swap(vcpu->arch.cpuid_entries, e2);
571
	swap(vcpu->arch.cpuid_nent, nent);
572
	return r;
573
}
574

575
/* when an old userspace process fills a new kernel module */
576
int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
577
			     struct kvm_cpuid *cpuid,
578
			     struct kvm_cpuid_entry __user *entries)
579
{
580
	int r, i;
581
	struct kvm_cpuid_entry *e = NULL;
582
	struct kvm_cpuid_entry2 *e2 = NULL;
583

584
	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
585
		return -E2BIG;
586

587
	if (cpuid->nent) {
588
		e = vmemdup_array_user(entries, cpuid->nent, sizeof(*e));
589
		if (IS_ERR(e))
590
			return PTR_ERR(e);
591

592
		e2 = kvmalloc_array(cpuid->nent, sizeof(*e2), GFP_KERNEL_ACCOUNT);
593
		if (!e2) {
594
			r = -ENOMEM;
595
			goto out_free_cpuid;
596
		}
597
	}
598
	for (i = 0; i < cpuid->nent; i++) {
599
		e2[i].function = e[i].function;
600
		e2[i].eax = e[i].eax;
601
		e2[i].ebx = e[i].ebx;
602
		e2[i].ecx = e[i].ecx;
603
		e2[i].edx = e[i].edx;
604
		e2[i].index = 0;
605
		e2[i].flags = 0;
606
		e2[i].padding[0] = 0;
607
		e2[i].padding[1] = 0;
608
		e2[i].padding[2] = 0;
609
	}
610

611
	r = kvm_set_cpuid(vcpu, e2, cpuid->nent);
612
	if (r)
613
		kvfree(e2);
614

615
out_free_cpuid:
616
	kvfree(e);
617

618
	return r;
619
}
620

621
int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
622
			      struct kvm_cpuid2 *cpuid,
623
			      struct kvm_cpuid_entry2 __user *entries)
624
{
625
	struct kvm_cpuid_entry2 *e2 = NULL;
626
	int r;
627

628
	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
629
		return -E2BIG;
630

631
	if (cpuid->nent) {
632
		e2 = vmemdup_array_user(entries, cpuid->nent, sizeof(*e2));
633
		if (IS_ERR(e2))
634
			return PTR_ERR(e2);
635
	}
636

637
	r = kvm_set_cpuid(vcpu, e2, cpuid->nent);
638
	if (r)
639
		kvfree(e2);
640

641
	return r;
642
}
643

644
int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
645
			      struct kvm_cpuid2 *cpuid,
646
			      struct kvm_cpuid_entry2 __user *entries)
647
{
648
	if (cpuid->nent < vcpu->arch.cpuid_nent)
649
		return -E2BIG;
650

651
	if (vcpu->arch.cpuid_dynamic_bits_dirty)
652
		kvm_update_cpuid_runtime(vcpu);
653

654
	if (copy_to_user(entries, vcpu->arch.cpuid_entries,
655
			 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
656
		return -EFAULT;
657

658
	cpuid->nent = vcpu->arch.cpuid_nent;
659
	return 0;
660
}
661

662
static __always_inline u32 raw_cpuid_get(struct cpuid_reg cpuid)
663
{
664
	struct kvm_cpuid_entry2 entry;
665
	u32 base;
666

667
	/*
668
	 * KVM only supports features defined by Intel (0x0), AMD (0x80000000),
669
	 * and Centaur (0xc0000000).  WARN if a feature for new vendor base is
670
	 * defined, as this and other code would need to be updated.
671
	 */
672
	base = cpuid.function & 0xffff0000;
673
	if (WARN_ON_ONCE(base && base != 0x80000000 && base != 0xc0000000))
674
		return 0;
675

676
	if (cpuid_eax(base) < cpuid.function)
677
		return 0;
678

679
	cpuid_count(cpuid.function, cpuid.index,
680
		    &entry.eax, &entry.ebx, &entry.ecx, &entry.edx);
681

682
	return *__cpuid_entry_get_reg(&entry, cpuid.reg);
683
}
684

685
/*
686
 * For kernel-defined leafs, mask KVM's supported feature set with the kernel's
687
 * capabilities as well as raw CPUID.  For KVM-defined leafs, consult only raw
688
 * CPUID, as KVM is the one and only authority (in the kernel).
689
 */
690
#define kvm_cpu_cap_init(leaf, feature_initializers...)			\
691
do {									\
692
	const struct cpuid_reg cpuid = x86_feature_cpuid(leaf * 32);	\
693
	const u32 __maybe_unused kvm_cpu_cap_init_in_progress = leaf;	\
694
	const u32 *kernel_cpu_caps = boot_cpu_data.x86_capability;	\
695
	u32 kvm_cpu_cap_passthrough = 0;				\
696
	u32 kvm_cpu_cap_synthesized = 0;				\
697
	u32 kvm_cpu_cap_emulated = 0;					\
698
	u32 kvm_cpu_cap_features = 0;					\
699
									\
700
	feature_initializers						\
701
									\
702
	kvm_cpu_caps[leaf] = kvm_cpu_cap_features;			\
703
									\
704
	if (leaf < NCAPINTS)						\
705
		kvm_cpu_caps[leaf] &= kernel_cpu_caps[leaf];		\
706
									\
707
	kvm_cpu_caps[leaf] |= kvm_cpu_cap_passthrough;			\
708
	kvm_cpu_caps[leaf] &= (raw_cpuid_get(cpuid) |			\
709
			       kvm_cpu_cap_synthesized);		\
710
	kvm_cpu_caps[leaf] |= kvm_cpu_cap_emulated;			\
711
} while (0)
712

713
/*
714
 * Assert that the feature bit being declared, e.g. via F(), is in the CPUID
715
 * word that's being initialized.  Exempt 0x8000_0001.EDX usage of 0x1.EDX
716
 * features, as AMD duplicated many 0x1.EDX features into 0x8000_0001.EDX.
717
 */
718
#define KVM_VALIDATE_CPU_CAP_USAGE(name)				\
719
do {									\
720
	u32 __leaf = __feature_leaf(X86_FEATURE_##name);		\
721
									\
722
	BUILD_BUG_ON(__leaf != kvm_cpu_cap_init_in_progress);		\
723
} while (0)
724

725
#define F(name)							\
726
({								\
727
	KVM_VALIDATE_CPU_CAP_USAGE(name);			\
728
	kvm_cpu_cap_features |= feature_bit(name);		\
729
})
730

731
/* Scattered Flag - For features that are scattered by cpufeatures.h. */
732
#define SCATTERED_F(name)					\
733
({								\
734
	BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES);	\
735
	KVM_VALIDATE_CPU_CAP_USAGE(name);			\
736
	if (boot_cpu_has(X86_FEATURE_##name))			\
737
		F(name);					\
738
})
739

740
/* Features that KVM supports only on 64-bit kernels. */
741
#define X86_64_F(name)						\
742
({								\
743
	KVM_VALIDATE_CPU_CAP_USAGE(name);			\
744
	if (IS_ENABLED(CONFIG_X86_64))				\
745
		F(name);					\
746
})
747

748
/*
749
 * Emulated Feature - For features that KVM emulates in software irrespective
750
 * of host CPU/kernel support.
751
 */
752
#define EMULATED_F(name)					\
753
({								\
754
	kvm_cpu_cap_emulated |= feature_bit(name);		\
755
	F(name);						\
756
})
757

758
/*
759
 * Synthesized Feature - For features that are synthesized into boot_cpu_data,
760
 * i.e. may not be present in the raw CPUID, but can still be advertised to
761
 * userspace.  Primarily used for mitigation related feature flags.
762
 */
763
#define SYNTHESIZED_F(name)					\
764
({								\
765
	kvm_cpu_cap_synthesized |= feature_bit(name);		\
766
	F(name);						\
767
})
768

769
/*
770
 * Passthrough Feature - For features that KVM supports based purely on raw
771
 * hardware CPUID, i.e. that KVM virtualizes even if the host kernel doesn't
772
 * use the feature.  Simply force set the feature in KVM's capabilities, raw
773
 * CPUID support will be factored in by kvm_cpu_cap_mask().
774
 */
775
#define PASSTHROUGH_F(name)					\
776
({								\
777
	kvm_cpu_cap_passthrough |= feature_bit(name);		\
778
	F(name);						\
779
})
780

781
/*
782
 * Aliased Features - For features in 0x8000_0001.EDX that are duplicates of
783
 * identical 0x1.EDX features, and thus are aliased from 0x1 to 0x8000_0001.
784
 */
785
#define ALIASED_1_EDX_F(name)							\
786
({										\
787
	BUILD_BUG_ON(__feature_leaf(X86_FEATURE_##name) != CPUID_1_EDX);	\
788
	BUILD_BUG_ON(kvm_cpu_cap_init_in_progress != CPUID_8000_0001_EDX);	\
789
	kvm_cpu_cap_features |= feature_bit(name);				\
790
})
791

792
/*
793
 * Vendor Features - For features that KVM supports, but are added in later
794
 * because they require additional vendor enabling.
795
 */
796
#define VENDOR_F(name)						\
797
({								\
798
	KVM_VALIDATE_CPU_CAP_USAGE(name);			\
799
})
800

801
/*
802
 * Runtime Features - For features that KVM dynamically sets/clears at runtime,
803
 * e.g. when CR4 changes, but which are never advertised to userspace.
804
 */
805
#define RUNTIME_F(name)						\
806
({								\
807
	KVM_VALIDATE_CPU_CAP_USAGE(name);			\
808
})
809

810
/*
811
 * Undefine the MSR bit macro to avoid token concatenation issues when
812
 * processing X86_FEATURE_SPEC_CTRL_SSBD.
813
 */
814
#undef SPEC_CTRL_SSBD
815

816
/* DS is defined by ptrace-abi.h on 32-bit builds. */
817
#undef DS
818

819
void kvm_set_cpu_caps(void)
820
{
821
	memset(kvm_cpu_caps, 0, sizeof(kvm_cpu_caps));
822

823
	BUILD_BUG_ON(sizeof(kvm_cpu_caps) - (NKVMCAPINTS * sizeof(*kvm_cpu_caps)) >
824
		     sizeof(boot_cpu_data.x86_capability));
825

826
	kvm_cpu_cap_init(CPUID_1_ECX,
827
		F(XMM3),
828
		F(PCLMULQDQ),
829
		VENDOR_F(DTES64),
830
		/*
831
		 * NOTE: MONITOR (and MWAIT) are emulated as NOP, but *not*
832
		 * advertised to guests via CPUID!  MWAIT is also technically a
833
		 * runtime flag thanks to IA32_MISC_ENABLES; mark it as such so
834
		 * that KVM is aware that it's a known, unadvertised flag.
835
		 */
836
		RUNTIME_F(MWAIT),
837
		/* DS-CPL */
838
		VENDOR_F(VMX),
839
		/* SMX, EST */
840
		/* TM2 */
841
		F(SSSE3),
842
		/* CNXT-ID */
843
		/* Reserved */
844
		F(FMA),
845
		F(CX16),
846
		/* xTPR Update */
847
		F(PDCM),
848
		F(PCID),
849
		/* Reserved, DCA */
850
		F(XMM4_1),
851
		F(XMM4_2),
852
		EMULATED_F(X2APIC),
853
		F(MOVBE),
854
		F(POPCNT),
855
		EMULATED_F(TSC_DEADLINE_TIMER),
856
		F(AES),
857
		F(XSAVE),
858
		RUNTIME_F(OSXSAVE),
859
		F(AVX),
860
		F(F16C),
861
		F(RDRAND),
862
		EMULATED_F(HYPERVISOR),
863
	);
864

865
	kvm_cpu_cap_init(CPUID_1_EDX,
866
		F(FPU),
867
		F(VME),
868
		F(DE),
869
		F(PSE),
870
		F(TSC),
871
		F(MSR),
872
		F(PAE),
873
		F(MCE),
874
		F(CX8),
875
		F(APIC),
876
		/* Reserved */
877
		F(SEP),
878
		F(MTRR),
879
		F(PGE),
880
		F(MCA),
881
		F(CMOV),
882
		F(PAT),
883
		F(PSE36),
884
		/* PSN */
885
		F(CLFLUSH),
886
		/* Reserved */
887
		VENDOR_F(DS),
888
		/* ACPI */
889
		F(MMX),
890
		F(FXSR),
891
		F(XMM),
892
		F(XMM2),
893
		F(SELFSNOOP),
894
		/* HTT, TM, Reserved, PBE */
895
	);
896

897
	kvm_cpu_cap_init(CPUID_7_0_EBX,
898
		F(FSGSBASE),
899
		EMULATED_F(TSC_ADJUST),
900
		F(SGX),
901
		F(BMI1),
902
		F(HLE),
903
		F(AVX2),
904
		F(FDP_EXCPTN_ONLY),
905
		F(SMEP),
906
		F(BMI2),
907
		F(ERMS),
908
		F(INVPCID),
909
		F(RTM),
910
		F(ZERO_FCS_FDS),
911
		VENDOR_F(MPX),
912
		F(AVX512F),
913
		F(AVX512DQ),
914
		F(RDSEED),
915
		F(ADX),
916
		F(SMAP),
917
		F(AVX512IFMA),
918
		F(CLFLUSHOPT),
919
		F(CLWB),
920
		VENDOR_F(INTEL_PT),
921
		F(AVX512PF),
922
		F(AVX512ER),
923
		F(AVX512CD),
924
		F(SHA_NI),
925
		F(AVX512BW),
926
		F(AVX512VL),
927
	);
928

929
	kvm_cpu_cap_init(CPUID_7_ECX,
930
		F(AVX512VBMI),
931
		PASSTHROUGH_F(LA57),
932
		F(PKU),
933
		RUNTIME_F(OSPKE),
934
		F(RDPID),
935
		F(AVX512_VPOPCNTDQ),
936
		F(UMIP),
937
		F(AVX512_VBMI2),
938
		F(GFNI),
939
		F(VAES),
940
		F(VPCLMULQDQ),
941
		F(AVX512_VNNI),
942
		F(AVX512_BITALG),
943
		F(CLDEMOTE),
944
		F(MOVDIRI),
945
		F(MOVDIR64B),
946
		VENDOR_F(WAITPKG),
947
		F(SGX_LC),
948
		F(BUS_LOCK_DETECT),
949
		X86_64_F(SHSTK),
950
	);
951

952
	/*
953
	 * PKU not yet implemented for shadow paging and requires OSPKE
954
	 * to be set on the host. Clear it if that is not the case
955
	 */
956
	if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE))
957
		kvm_cpu_cap_clear(X86_FEATURE_PKU);
958

959
	/*
960
	 * Shadow Stacks aren't implemented in the Shadow MMU.  Shadow Stack
961
	 * accesses require "magic" Writable=0,Dirty=1 protection, which KVM
962
	 * doesn't know how to emulate or map.
963
	 */
964
	if (!tdp_enabled)
965
		kvm_cpu_cap_clear(X86_FEATURE_SHSTK);
966

967
	kvm_cpu_cap_init(CPUID_7_EDX,
968
		F(AVX512_4VNNIW),
969
		F(AVX512_4FMAPS),
970
		F(SPEC_CTRL),
971
		F(SPEC_CTRL_SSBD),
972
		EMULATED_F(ARCH_CAPABILITIES),
973
		F(INTEL_STIBP),
974
		F(MD_CLEAR),
975
		F(AVX512_VP2INTERSECT),
976
		F(FSRM),
977
		F(SERIALIZE),
978
		F(TSXLDTRK),
979
		F(AVX512_FP16),
980
		F(AMX_TILE),
981
		F(AMX_INT8),
982
		F(AMX_BF16),
983
		F(FLUSH_L1D),
984
		F(IBT),
985
	);
986

987
	/*
988
	 * Disable support for IBT and SHSTK if KVM is configured to emulate
989
	 * accesses to reserved GPAs, as KVM's emulator doesn't support IBT or
990
	 * SHSTK, nor does KVM handle Shadow Stack #PFs (see above).
991
	 */
992
	if (allow_smaller_maxphyaddr) {
993
		kvm_cpu_cap_clear(X86_FEATURE_SHSTK);
994
		kvm_cpu_cap_clear(X86_FEATURE_IBT);
995
	}
996

997
	if (boot_cpu_has(X86_FEATURE_AMD_IBPB_RET) &&
998
	    boot_cpu_has(X86_FEATURE_AMD_IBPB) &&
999
	    boot_cpu_has(X86_FEATURE_AMD_IBRS))
1000
		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL);
1001
	if (boot_cpu_has(X86_FEATURE_STIBP))
1002
		kvm_cpu_cap_set(X86_FEATURE_INTEL_STIBP);
1003
	if (boot_cpu_has(X86_FEATURE_AMD_SSBD))
1004
		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
1005

1006
	kvm_cpu_cap_init(CPUID_7_1_EAX,
1007
		F(SHA512),
1008
		F(SM3),
1009
		F(SM4),
1010
		F(AVX_VNNI),
1011
		F(AVX512_BF16),
1012
		F(CMPCCXADD),
1013
		F(FZRM),
1014
		F(FSRS),
1015
		F(FSRC),
1016
		F(WRMSRNS),
1017
		X86_64_F(LKGS),
1018
		F(AMX_FP16),
1019
		F(AVX_IFMA),
1020
		F(LAM),
1021
	);
1022

1023
	kvm_cpu_cap_init(CPUID_7_1_ECX,
1024
		SCATTERED_F(MSR_IMM),
1025
	);
1026

1027
	kvm_cpu_cap_init(CPUID_7_1_EDX,
1028
		F(AVX_VNNI_INT8),
1029
		F(AVX_NE_CONVERT),
1030
		F(AMX_COMPLEX),
1031
		F(AVX_VNNI_INT16),
1032
		F(PREFETCHITI),
1033
		F(AVX10),
1034
	);
1035

1036
	kvm_cpu_cap_init(CPUID_7_2_EDX,
1037
		F(INTEL_PSFD),
1038
		F(IPRED_CTRL),
1039
		F(RRSBA_CTRL),
1040
		F(DDPD_U),
1041
		F(BHI_CTRL),
1042
		F(MCDT_NO),
1043
	);
1044

1045
	kvm_cpu_cap_init(CPUID_D_1_EAX,
1046
		F(XSAVEOPT),
1047
		F(XSAVEC),
1048
		F(XGETBV1),
1049
		F(XSAVES),
1050
		X86_64_F(XFD),
1051
	);
1052

1053
	kvm_cpu_cap_init(CPUID_12_EAX,
1054
		SCATTERED_F(SGX1),
1055
		SCATTERED_F(SGX2),
1056
		SCATTERED_F(SGX_EDECCSSA),
1057
	);
1058

1059
	kvm_cpu_cap_init(CPUID_24_0_EBX,
1060
		F(AVX10_128),
1061
		F(AVX10_256),
1062
		F(AVX10_512),
1063
	);
1064

1065
	kvm_cpu_cap_init(CPUID_8000_0001_ECX,
1066
		F(LAHF_LM),
1067
		F(CMP_LEGACY),
1068
		VENDOR_F(SVM),
1069
		/* ExtApicSpace */
1070
		F(CR8_LEGACY),
1071
		F(ABM),
1072
		F(SSE4A),
1073
		F(MISALIGNSSE),
1074
		F(3DNOWPREFETCH),
1075
		F(OSVW),
1076
		/* IBS */
1077
		F(XOP),
1078
		/* SKINIT, WDT, LWP */
1079
		F(FMA4),
1080
		F(TBM),
1081
		F(TOPOEXT),
1082
		VENDOR_F(PERFCTR_CORE),
1083
	);
1084

1085
	kvm_cpu_cap_init(CPUID_8000_0001_EDX,
1086
		ALIASED_1_EDX_F(FPU),
1087
		ALIASED_1_EDX_F(VME),
1088
		ALIASED_1_EDX_F(DE),
1089
		ALIASED_1_EDX_F(PSE),
1090
		ALIASED_1_EDX_F(TSC),
1091
		ALIASED_1_EDX_F(MSR),
1092
		ALIASED_1_EDX_F(PAE),
1093
		ALIASED_1_EDX_F(MCE),
1094
		ALIASED_1_EDX_F(CX8),
1095
		ALIASED_1_EDX_F(APIC),
1096
		/* Reserved */
1097
		F(SYSCALL),
1098
		ALIASED_1_EDX_F(MTRR),
1099
		ALIASED_1_EDX_F(PGE),
1100
		ALIASED_1_EDX_F(MCA),
1101
		ALIASED_1_EDX_F(CMOV),
1102
		ALIASED_1_EDX_F(PAT),
1103
		ALIASED_1_EDX_F(PSE36),
1104
		/* Reserved */
1105
		F(NX),
1106
		/* Reserved */
1107
		F(MMXEXT),
1108
		ALIASED_1_EDX_F(MMX),
1109
		ALIASED_1_EDX_F(FXSR),
1110
		F(FXSR_OPT),
1111
		X86_64_F(GBPAGES),
1112
		F(RDTSCP),
1113
		/* Reserved */
1114
		X86_64_F(LM),
1115
		F(3DNOWEXT),
1116
		F(3DNOW),
1117
	);
1118

1119
	if (!tdp_enabled && IS_ENABLED(CONFIG_X86_64))
1120
		kvm_cpu_cap_set(X86_FEATURE_GBPAGES);
1121

1122
	kvm_cpu_cap_init(CPUID_8000_0007_EDX,
1123
		SCATTERED_F(CONSTANT_TSC),
1124
	);
1125

1126
	kvm_cpu_cap_init(CPUID_8000_0008_EBX,
1127
		F(CLZERO),
1128
		F(XSAVEERPTR),
1129
		F(WBNOINVD),
1130
		F(AMD_IBPB),
1131
		F(AMD_IBRS),
1132
		F(AMD_SSBD),
1133
		F(VIRT_SSBD),
1134
		F(AMD_SSB_NO),
1135
		F(AMD_STIBP),
1136
		F(AMD_STIBP_ALWAYS_ON),
1137
		F(AMD_IBRS_SAME_MODE),
1138
		F(AMD_PSFD),
1139
		F(AMD_IBPB_RET),
1140
	);
1141

1142
	/*
1143
	 * AMD has separate bits for each SPEC_CTRL bit.
1144
	 * arch/x86/kernel/cpu/bugs.c is kind enough to
1145
	 * record that in cpufeatures so use them.
1146
	 */
1147
	if (boot_cpu_has(X86_FEATURE_IBPB)) {
1148
		kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB);
1149
		if (boot_cpu_has(X86_FEATURE_SPEC_CTRL) &&
1150
		    !boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB))
1151
			kvm_cpu_cap_set(X86_FEATURE_AMD_IBPB_RET);
1152
	}
1153
	if (boot_cpu_has(X86_FEATURE_IBRS))
1154
		kvm_cpu_cap_set(X86_FEATURE_AMD_IBRS);
1155
	if (boot_cpu_has(X86_FEATURE_STIBP))
1156
		kvm_cpu_cap_set(X86_FEATURE_AMD_STIBP);
1157
	if (boot_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
1158
		kvm_cpu_cap_set(X86_FEATURE_AMD_SSBD);
1159
	if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1160
		kvm_cpu_cap_set(X86_FEATURE_AMD_SSB_NO);
1161
	/*
1162
	 * The preference is to use SPEC CTRL MSR instead of the
1163
	 * VIRT_SPEC MSR.
1164
	 */
1165
	if (boot_cpu_has(X86_FEATURE_LS_CFG_SSBD) &&
1166
	    !boot_cpu_has(X86_FEATURE_AMD_SSBD))
1167
		kvm_cpu_cap_set(X86_FEATURE_VIRT_SSBD);
1168

1169
	/* All SVM features required additional vendor module enabling. */
1170
	kvm_cpu_cap_init(CPUID_8000_000A_EDX,
1171
		VENDOR_F(NPT),
1172
		VENDOR_F(VMCBCLEAN),
1173
		VENDOR_F(FLUSHBYASID),
1174
		VENDOR_F(NRIPS),
1175
		VENDOR_F(TSCRATEMSR),
1176
		VENDOR_F(V_VMSAVE_VMLOAD),
1177
		VENDOR_F(LBRV),
1178
		VENDOR_F(PAUSEFILTER),
1179
		VENDOR_F(PFTHRESHOLD),
1180
		VENDOR_F(VGIF),
1181
		VENDOR_F(VNMI),
1182
		VENDOR_F(SVME_ADDR_CHK),
1183
	);
1184

1185
	kvm_cpu_cap_init(CPUID_8000_001F_EAX,
1186
		VENDOR_F(SME),
1187
		VENDOR_F(SEV),
1188
		/* VM_PAGE_FLUSH */
1189
		VENDOR_F(SEV_ES),
1190
		F(SME_COHERENT),
1191
	);
1192

1193
	kvm_cpu_cap_init(CPUID_8000_0021_EAX,
1194
		F(NO_NESTED_DATA_BP),
1195
		F(WRMSR_XX_BASE_NS),
1196
		/*
1197
		 * Synthesize "LFENCE is serializing" into the AMD-defined entry
1198
		 * in KVM's supported CPUID, i.e. if the feature is reported as
1199
		 * supported by the kernel.  LFENCE_RDTSC was a Linux-defined
1200
		 * synthetic feature long before AMD joined the bandwagon, e.g.
1201
		 * LFENCE is serializing on most CPUs that support SSE2.  On
1202
		 * CPUs that don't support AMD's leaf, ANDing with the raw host
1203
		 * CPUID will drop the flags, and reporting support in AMD's
1204
		 * leaf can make it easier for userspace to detect the feature.
1205
		 */
1206
		SYNTHESIZED_F(LFENCE_RDTSC),
1207
		/* SmmPgCfgLock */
1208
		/* 4: Resv */
1209
		SYNTHESIZED_F(VERW_CLEAR),
1210
		F(NULL_SEL_CLR_BASE),
1211
		/* UpperAddressIgnore */
1212
		F(AUTOIBRS),
1213
		F(PREFETCHI),
1214
		EMULATED_F(NO_SMM_CTL_MSR),
1215
		/* PrefetchCtlMsr */
1216
		/* GpOnUserCpuid */
1217
		/* EPSF */
1218
		SYNTHESIZED_F(SBPB),
1219
		SYNTHESIZED_F(IBPB_BRTYPE),
1220
		SYNTHESIZED_F(SRSO_NO),
1221
		F(SRSO_USER_KERNEL_NO),
1222
	);
1223

1224
	kvm_cpu_cap_init(CPUID_8000_0021_ECX,
1225
		SYNTHESIZED_F(TSA_SQ_NO),
1226
		SYNTHESIZED_F(TSA_L1_NO),
1227
	);
1228

1229
	kvm_cpu_cap_init(CPUID_8000_0022_EAX,
1230
		F(PERFMON_V2),
1231
	);
1232

1233
	if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
1234
		kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE);
1235

1236
	kvm_cpu_cap_init(CPUID_C000_0001_EDX,
1237
		F(XSTORE),
1238
		F(XSTORE_EN),
1239
		F(XCRYPT),
1240
		F(XCRYPT_EN),
1241
		F(ACE2),
1242
		F(ACE2_EN),
1243
		F(PHE),
1244
		F(PHE_EN),
1245
		F(PMM),
1246
		F(PMM_EN),
1247
	);
1248

1249
	/*
1250
	 * Hide RDTSCP and RDPID if either feature is reported as supported but
1251
	 * probing MSR_TSC_AUX failed.  This is purely a sanity check and
1252
	 * should never happen, but the guest will likely crash if RDTSCP or
1253
	 * RDPID is misreported, and KVM has botched MSR_TSC_AUX emulation in
1254
	 * the past.  For example, the sanity check may fire if this instance of
1255
	 * KVM is running as L1 on top of an older, broken KVM.
1256
	 */
1257
	if (WARN_ON((kvm_cpu_cap_has(X86_FEATURE_RDTSCP) ||
1258
		     kvm_cpu_cap_has(X86_FEATURE_RDPID)) &&
1259
		     !kvm_is_supported_user_return_msr(MSR_TSC_AUX))) {
1260
		kvm_cpu_cap_clear(X86_FEATURE_RDTSCP);
1261
		kvm_cpu_cap_clear(X86_FEATURE_RDPID);
1262
	}
1263
}
1264
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_set_cpu_caps);
1265

1266
#undef F
1267
#undef SCATTERED_F
1268
#undef X86_64_F
1269
#undef EMULATED_F
1270
#undef SYNTHESIZED_F
1271
#undef PASSTHROUGH_F
1272
#undef ALIASED_1_EDX_F
1273
#undef VENDOR_F
1274
#undef RUNTIME_F
1275

1276
struct kvm_cpuid_array {
1277
	struct kvm_cpuid_entry2 *entries;
1278
	int maxnent;
1279
	int nent;
1280
};
1281

1282
static struct kvm_cpuid_entry2 *get_next_cpuid(struct kvm_cpuid_array *array)
1283
{
1284
	if (array->nent >= array->maxnent)
1285
		return NULL;
1286

1287
	return &array->entries[array->nent++];
1288
}
1289

1290
static struct kvm_cpuid_entry2 *do_host_cpuid(struct kvm_cpuid_array *array,
1291
					      u32 function, u32 index)
1292
{
1293
	struct kvm_cpuid_entry2 *entry = get_next_cpuid(array);
1294

1295
	if (!entry)
1296
		return NULL;
1297

1298
	memset(entry, 0, sizeof(*entry));
1299
	entry->function = function;
1300
	entry->index = index;
1301
	switch (function & 0xC0000000) {
1302
	case 0x40000000:
1303
		/* Hypervisor leaves are always synthesized by __do_cpuid_func.  */
1304
		return entry;
1305

1306
	case 0x80000000:
1307
		/*
1308
		 * 0x80000021 is sometimes synthesized by __do_cpuid_func, which
1309
		 * would result in out-of-bounds calls to do_host_cpuid.
1310
		 */
1311
		{
1312
			static int max_cpuid_80000000;
1313
			if (!READ_ONCE(max_cpuid_80000000))
1314
				WRITE_ONCE(max_cpuid_80000000, cpuid_eax(0x80000000));
1315
			if (function > READ_ONCE(max_cpuid_80000000))
1316
				return entry;
1317
		}
1318
		break;
1319

1320
	default:
1321
		break;
1322
	}
1323

1324
	cpuid_count(entry->function, entry->index,
1325
		    &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1326

1327
	if (cpuid_function_is_indexed(function))
1328
		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1329

1330
	return entry;
1331
}
1332

1333
static int cpuid_func_emulated(struct kvm_cpuid_entry2 *entry, u32 func,
1334
			       bool include_partially_emulated)
1335
{
1336
	memset(entry, 0, sizeof(*entry));
1337

1338
	entry->function = func;
1339
	entry->index = 0;
1340
	entry->flags = 0;
1341

1342
	switch (func) {
1343
	case 0:
1344
		entry->eax = 7;
1345
		return 1;
1346
	case 1:
1347
		entry->ecx = feature_bit(MOVBE);
1348
		/*
1349
		 * KVM allows userspace to enumerate MONITOR+MWAIT support to
1350
		 * the guest, but the MWAIT feature flag is never advertised
1351
		 * to userspace because MONITOR+MWAIT aren't virtualized by
1352
		 * hardware, can't be faithfully emulated in software (KVM
1353
		 * emulates them as NOPs), and allowing the guest to execute
1354
		 * them natively requires enabling a per-VM capability.
1355
		 */
1356
		if (include_partially_emulated)
1357
			entry->ecx |= feature_bit(MWAIT);
1358
		return 1;
1359
	case 7:
1360
		entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1361
		entry->eax = 0;
1362
		if (kvm_cpu_cap_has(X86_FEATURE_RDTSCP))
1363
			entry->ecx = feature_bit(RDPID);
1364
		return 1;
1365
	default:
1366
		return 0;
1367
	}
1368
}
1369

1370
static int __do_cpuid_func_emulated(struct kvm_cpuid_array *array, u32 func)
1371
{
1372
	if (array->nent >= array->maxnent)
1373
		return -E2BIG;
1374

1375
	array->nent += cpuid_func_emulated(&array->entries[array->nent], func, false);
1376
	return 0;
1377
}
1378

1379
static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
1380
{
1381
	struct kvm_cpuid_entry2 *entry;
1382
	int r, i, max_idx;
1383

1384
	/* all calls to cpuid_count() should be made on the same cpu */
1385
	get_cpu();
1386

1387
	r = -E2BIG;
1388

1389
	entry = do_host_cpuid(array, function, 0);
1390
	if (!entry)
1391
		goto out;
1392

1393
	switch (function) {
1394
	case 0:
1395
		/* Limited to the highest leaf implemented in KVM. */
1396
		entry->eax = min(entry->eax, 0x24U);
1397
		break;
1398
	case 1:
1399
		cpuid_entry_override(entry, CPUID_1_EDX);
1400
		cpuid_entry_override(entry, CPUID_1_ECX);
1401
		break;
1402
	case 2:
1403
		/*
1404
		 * On ancient CPUs, function 2 entries are STATEFUL.  That is,
1405
		 * CPUID(function=2, index=0) may return different results each
1406
		 * time, with the least-significant byte in EAX enumerating the
1407
		 * number of times software should do CPUID(2, 0).
1408
		 *
1409
		 * Modern CPUs, i.e. every CPU KVM has *ever* run on are less
1410
		 * idiotic.  Intel's SDM states that EAX & 0xff "will always
1411
		 * return 01H. Software should ignore this value and not
1412
		 * interpret it as an informational descriptor", while AMD's
1413
		 * APM states that CPUID(2) is reserved.
1414
		 *
1415
		 * WARN if a frankenstein CPU that supports virtualization and
1416
		 * a stateful CPUID.0x2 is encountered.
1417
		 */
1418
		WARN_ON_ONCE((entry->eax & 0xff) > 1);
1419
		break;
1420
	/* functions 4 and 0x8000001d have additional index. */
1421
	case 4:
1422
	case 0x8000001d:
1423
		/*
1424
		 * Read entries until the cache type in the previous entry is
1425
		 * zero, i.e. indicates an invalid entry.
1426
		 */
1427
		for (i = 1; entry->eax & 0x1f; ++i) {
1428
			entry = do_host_cpuid(array, function, i);
1429
			if (!entry)
1430
				goto out;
1431
		}
1432
		break;
1433
	case 6: /* Thermal management */
1434
		entry->eax = 0x4; /* allow ARAT */
1435
		entry->ebx = 0;
1436
		entry->ecx = 0;
1437
		entry->edx = 0;
1438
		break;
1439
	/* function 7 has additional index. */
1440
	case 7:
1441
		max_idx = entry->eax = min(entry->eax, 2u);
1442
		cpuid_entry_override(entry, CPUID_7_0_EBX);
1443
		cpuid_entry_override(entry, CPUID_7_ECX);
1444
		cpuid_entry_override(entry, CPUID_7_EDX);
1445

1446
		/* KVM only supports up to 0x7.2, capped above via min(). */
1447
		if (max_idx >= 1) {
1448
			entry = do_host_cpuid(array, function, 1);
1449
			if (!entry)
1450
				goto out;
1451

1452
			cpuid_entry_override(entry, CPUID_7_1_EAX);
1453
			cpuid_entry_override(entry, CPUID_7_1_ECX);
1454
			cpuid_entry_override(entry, CPUID_7_1_EDX);
1455
			entry->ebx = 0;
1456
		}
1457
		if (max_idx >= 2) {
1458
			entry = do_host_cpuid(array, function, 2);
1459
			if (!entry)
1460
				goto out;
1461

1462
			cpuid_entry_override(entry, CPUID_7_2_EDX);
1463
			entry->ecx = 0;
1464
			entry->ebx = 0;
1465
			entry->eax = 0;
1466
		}
1467
		break;
1468
	case 0xa: { /* Architectural Performance Monitoring */
1469
		union cpuid10_eax eax = { };
1470
		union cpuid10_edx edx = { };
1471

1472
		if (!enable_pmu || !static_cpu_has(X86_FEATURE_ARCH_PERFMON)) {
1473
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1474
			break;
1475
		}
1476

1477
		eax.split.version_id = kvm_pmu_cap.version;
1478
		eax.split.num_counters = kvm_pmu_cap.num_counters_gp;
1479
		eax.split.bit_width = kvm_pmu_cap.bit_width_gp;
1480
		eax.split.mask_length = kvm_pmu_cap.events_mask_len;
1481
		edx.split.num_counters_fixed = kvm_pmu_cap.num_counters_fixed;
1482
		edx.split.bit_width_fixed = kvm_pmu_cap.bit_width_fixed;
1483

1484
		if (kvm_pmu_cap.version)
1485
			edx.split.anythread_deprecated = 1;
1486

1487
		entry->eax = eax.full;
1488
		entry->ebx = kvm_pmu_cap.events_mask;
1489
		entry->ecx = 0;
1490
		entry->edx = edx.full;
1491
		break;
1492
	}
1493
	case 0x1f:
1494
	case 0xb:
1495
		/*
1496
		 * No topology; a valid topology is indicated by the presence
1497
		 * of subleaf 1.
1498
		 */
1499
		entry->eax = entry->ebx = entry->ecx = 0;
1500
		break;
1501
	case 0xd: {
1502
		u64 permitted_xcr0 = kvm_get_filtered_xcr0();
1503
		u64 permitted_xss = kvm_caps.supported_xss;
1504

1505
		entry->eax &= permitted_xcr0;
1506
		entry->ebx = xstate_required_size(permitted_xcr0, false);
1507
		entry->ecx = entry->ebx;
1508
		entry->edx &= permitted_xcr0 >> 32;
1509
		if (!permitted_xcr0)
1510
			break;
1511

1512
		entry = do_host_cpuid(array, function, 1);
1513
		if (!entry)
1514
			goto out;
1515

1516
		cpuid_entry_override(entry, CPUID_D_1_EAX);
1517
		if (entry->eax & (feature_bit(XSAVES) | feature_bit(XSAVEC)))
1518
			entry->ebx = xstate_required_size(permitted_xcr0 | permitted_xss,
1519
							  true);
1520
		else {
1521
			WARN_ON_ONCE(permitted_xss != 0);
1522
			entry->ebx = 0;
1523
		}
1524
		entry->ecx &= permitted_xss;
1525
		entry->edx &= permitted_xss >> 32;
1526

1527
		for (i = 2; i < 64; ++i) {
1528
			bool s_state;
1529
			if (permitted_xcr0 & BIT_ULL(i))
1530
				s_state = false;
1531
			else if (permitted_xss & BIT_ULL(i))
1532
				s_state = true;
1533
			else
1534
				continue;
1535

1536
			entry = do_host_cpuid(array, function, i);
1537
			if (!entry)
1538
				goto out;
1539

1540
			/*
1541
			 * The supported check above should have filtered out
1542
			 * invalid sub-leafs.  Only valid sub-leafs should
1543
			 * reach this point, and they should have a non-zero
1544
			 * save state size.  Furthermore, check whether the
1545
			 * processor agrees with permitted_xcr0/permitted_xss
1546
			 * on whether this is an XCR0- or IA32_XSS-managed area.
1547
			 */
1548
			if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {
1549
				--array->nent;
1550
				continue;
1551
			}
1552

1553
			if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
1554
				entry->ecx &= ~BIT_ULL(2);
1555
			entry->edx = 0;
1556
		}
1557
		break;
1558
	}
1559
	case 0x12:
1560
		/* Intel SGX */
1561
		if (!kvm_cpu_cap_has(X86_FEATURE_SGX)) {
1562
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1563
			break;
1564
		}
1565

1566
		/*
1567
		 * Index 0: Sub-features, MISCSELECT (a.k.a extended features)
1568
		 * and max enclave sizes.   The SGX sub-features and MISCSELECT
1569
		 * are restricted by kernel and KVM capabilities (like most
1570
		 * feature flags), while enclave size is unrestricted.
1571
		 */
1572
		cpuid_entry_override(entry, CPUID_12_EAX);
1573
		entry->ebx &= SGX_MISC_EXINFO;
1574

1575
		entry = do_host_cpuid(array, function, 1);
1576
		if (!entry)
1577
			goto out;
1578

1579
		/*
1580
		 * Index 1: SECS.ATTRIBUTES.  ATTRIBUTES are restricted a la
1581
		 * feature flags.  Advertise all supported flags, including
1582
		 * privileged attributes that require explicit opt-in from
1583
		 * userspace.  ATTRIBUTES.XFRM is not adjusted as userspace is
1584
		 * expected to derive it from supported XCR0.
1585
		 */
1586
		entry->eax &= SGX_ATTR_PRIV_MASK | SGX_ATTR_UNPRIV_MASK;
1587
		entry->ebx &= 0;
1588
		break;
1589
	/* Intel PT */
1590
	case 0x14:
1591
		if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT)) {
1592
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1593
			break;
1594
		}
1595

1596
		for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
1597
			if (!do_host_cpuid(array, function, i))
1598
				goto out;
1599
		}
1600
		break;
1601
	/* Intel AMX TILE */
1602
	case 0x1d:
1603
		if (!kvm_cpu_cap_has(X86_FEATURE_AMX_TILE)) {
1604
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1605
			break;
1606
		}
1607

1608
		for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
1609
			if (!do_host_cpuid(array, function, i))
1610
				goto out;
1611
		}
1612
		break;
1613
	case 0x1e: /* TMUL information */
1614
		if (!kvm_cpu_cap_has(X86_FEATURE_AMX_TILE)) {
1615
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1616
			break;
1617
		}
1618
		break;
1619
	case 0x24: {
1620
		u8 avx10_version;
1621

1622
		if (!kvm_cpu_cap_has(X86_FEATURE_AVX10)) {
1623
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1624
			break;
1625
		}
1626

1627
		/*
1628
		 * The AVX10 version is encoded in EBX[7:0].  Note, the version
1629
		 * is guaranteed to be >=1 if AVX10 is supported.  Note #2, the
1630
		 * version needs to be captured before overriding EBX features!
1631
		 */
1632
		avx10_version = min_t(u8, entry->ebx & 0xff, 1);
1633
		cpuid_entry_override(entry, CPUID_24_0_EBX);
1634
		entry->ebx |= avx10_version;
1635

1636
		entry->eax = 0;
1637
		entry->ecx = 0;
1638
		entry->edx = 0;
1639
		break;
1640
	}
1641
	case KVM_CPUID_SIGNATURE: {
1642
		const u32 *sigptr = (const u32 *)KVM_SIGNATURE;
1643
		entry->eax = KVM_CPUID_FEATURES;
1644
		entry->ebx = sigptr[0];
1645
		entry->ecx = sigptr[1];
1646
		entry->edx = sigptr[2];
1647
		break;
1648
	}
1649
	case KVM_CPUID_FEATURES:
1650
		entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
1651
			     (1 << KVM_FEATURE_NOP_IO_DELAY) |
1652
			     (1 << KVM_FEATURE_CLOCKSOURCE2) |
1653
			     (1 << KVM_FEATURE_ASYNC_PF) |
1654
			     (1 << KVM_FEATURE_PV_EOI) |
1655
			     (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
1656
			     (1 << KVM_FEATURE_PV_UNHALT) |
1657
			     (1 << KVM_FEATURE_PV_TLB_FLUSH) |
1658
			     (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
1659
			     (1 << KVM_FEATURE_PV_SEND_IPI) |
1660
			     (1 << KVM_FEATURE_POLL_CONTROL) |
1661
			     (1 << KVM_FEATURE_PV_SCHED_YIELD) |
1662
			     (1 << KVM_FEATURE_ASYNC_PF_INT);
1663

1664
		if (sched_info_on())
1665
			entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
1666

1667
		entry->ebx = 0;
1668
		entry->ecx = 0;
1669
		entry->edx = 0;
1670
		break;
1671
	case 0x80000000:
1672
		entry->eax = min(entry->eax, 0x80000022);
1673
		/*
1674
		 * Serializing LFENCE is reported in a multitude of ways, and
1675
		 * NullSegClearsBase is not reported in CPUID on Zen2; help
1676
		 * userspace by providing the CPUID leaf ourselves.
1677
		 *
1678
		 * However, only do it if the host has CPUID leaf 0x8000001d.
1679
		 * QEMU thinks that it can query the host blindly for that
1680
		 * CPUID leaf if KVM reports that it supports 0x8000001d or
1681
		 * above.  The processor merrily returns values from the
1682
		 * highest Intel leaf which QEMU tries to use as the guest's
1683
		 * 0x8000001d.  Even worse, this can result in an infinite
1684
		 * loop if said highest leaf has no subleaves indexed by ECX.
1685
		 */
1686
		if (entry->eax >= 0x8000001d &&
1687
		    (static_cpu_has(X86_FEATURE_LFENCE_RDTSC)
1688
		     || !static_cpu_has_bug(X86_BUG_NULL_SEG)))
1689
			entry->eax = max(entry->eax, 0x80000021);
1690
		break;
1691
	case 0x80000001:
1692
		entry->ebx &= ~GENMASK(27, 16);
1693
		cpuid_entry_override(entry, CPUID_8000_0001_EDX);
1694
		cpuid_entry_override(entry, CPUID_8000_0001_ECX);
1695
		break;
1696
	case 0x80000005:
1697
		/*  Pass host L1 cache and TLB info. */
1698
		break;
1699
	case 0x80000006:
1700
		/* Drop reserved bits, pass host L2 cache and TLB info. */
1701
		entry->edx &= ~GENMASK(17, 16);
1702
		break;
1703
	case 0x80000007: /* Advanced power management */
1704
		cpuid_entry_override(entry, CPUID_8000_0007_EDX);
1705

1706
		/* mask against host */
1707
		entry->edx &= boot_cpu_data.x86_power;
1708
		entry->eax = entry->ebx = entry->ecx = 0;
1709
		break;
1710
	case 0x80000008: {
1711
		/*
1712
		 * GuestPhysAddrSize (EAX[23:16]) is intended for software
1713
		 * use.
1714
		 *
1715
		 * KVM's ABI is to report the effective MAXPHYADDR for the
1716
		 * guest in PhysAddrSize (phys_as), and the maximum
1717
		 * *addressable* GPA in GuestPhysAddrSize (g_phys_as).
1718
		 *
1719
		 * GuestPhysAddrSize is valid if and only if TDP is enabled,
1720
		 * in which case the max GPA that can be addressed by KVM may
1721
		 * be less than the max GPA that can be legally generated by
1722
		 * the guest, e.g. if MAXPHYADDR>48 but the CPU doesn't
1723
		 * support 5-level TDP.
1724
		 */
1725
		unsigned int virt_as = max((entry->eax >> 8) & 0xff, 48U);
1726
		unsigned int phys_as, g_phys_as;
1727

1728
		/*
1729
		 * If TDP (NPT) is disabled use the adjusted host MAXPHYADDR as
1730
		 * the guest operates in the same PA space as the host, i.e.
1731
		 * reductions in MAXPHYADDR for memory encryption affect shadow
1732
		 * paging, too.
1733
		 *
1734
		 * If TDP is enabled, use the raw bare metal MAXPHYADDR as
1735
		 * reductions to the HPAs do not affect GPAs.  The max
1736
		 * addressable GPA is the same as the max effective GPA, except
1737
		 * that it's capped at 48 bits if 5-level TDP isn't supported
1738
		 * (hardware processes bits 51:48 only when walking the fifth
1739
		 * level page table).
1740
		 */
1741
		if (!tdp_enabled) {
1742
			phys_as = boot_cpu_data.x86_phys_bits;
1743
			g_phys_as = 0;
1744
		} else {
1745
			phys_as = entry->eax & 0xff;
1746
			g_phys_as = phys_as;
1747
			if (kvm_mmu_get_max_tdp_level() < 5)
1748
				g_phys_as = min(g_phys_as, 48U);
1749
		}
1750

1751
		entry->eax = phys_as | (virt_as << 8) | (g_phys_as << 16);
1752
		entry->ecx &= ~(GENMASK(31, 16) | GENMASK(11, 8));
1753
		entry->edx = 0;
1754
		cpuid_entry_override(entry, CPUID_8000_0008_EBX);
1755
		break;
1756
	}
1757
	case 0x8000000A:
1758
		if (!kvm_cpu_cap_has(X86_FEATURE_SVM)) {
1759
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1760
			break;
1761
		}
1762
		entry->eax = 1; /* SVM revision 1 */
1763
		entry->ebx = 8; /* Lets support 8 ASIDs in case we add proper
1764
				   ASID emulation to nested SVM */
1765
		entry->ecx = 0; /* Reserved */
1766
		cpuid_entry_override(entry, CPUID_8000_000A_EDX);
1767
		break;
1768
	case 0x80000019:
1769
		entry->ecx = entry->edx = 0;
1770
		break;
1771
	case 0x8000001a:
1772
		entry->eax &= GENMASK(2, 0);
1773
		entry->ebx = entry->ecx = entry->edx = 0;
1774
		break;
1775
	case 0x8000001e:
1776
		/* Do not return host topology information.  */
1777
		entry->eax = entry->ebx = entry->ecx = 0;
1778
		entry->edx = 0; /* reserved */
1779
		break;
1780
	case 0x8000001F:
1781
		if (!kvm_cpu_cap_has(X86_FEATURE_SEV)) {
1782
			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1783
		} else {
1784
			cpuid_entry_override(entry, CPUID_8000_001F_EAX);
1785
			/* Clear NumVMPL since KVM does not support VMPL.  */
1786
			entry->ebx &= ~GENMASK(31, 12);
1787
			/*
1788
			 * Enumerate '0' for "PA bits reduction", the adjusted
1789
			 * MAXPHYADDR is enumerated directly (see 0x80000008).
1790
			 */
1791
			entry->ebx &= ~GENMASK(11, 6);
1792
		}
1793
		break;
1794
	case 0x80000020:
1795
		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1796
		break;
1797
	case 0x80000021:
1798
		entry->ebx = entry->edx = 0;
1799
		cpuid_entry_override(entry, CPUID_8000_0021_EAX);
1800
		cpuid_entry_override(entry, CPUID_8000_0021_ECX);
1801
		break;
1802
	/* AMD Extended Performance Monitoring and Debug */
1803
	case 0x80000022: {
1804
		union cpuid_0x80000022_ebx ebx = { };
1805

1806
		entry->ecx = entry->edx = 0;
1807
		if (!enable_pmu || !kvm_cpu_cap_has(X86_FEATURE_PERFMON_V2)) {
1808
			entry->eax = entry->ebx = 0;
1809
			break;
1810
		}
1811

1812
		cpuid_entry_override(entry, CPUID_8000_0022_EAX);
1813

1814
		ebx.split.num_core_pmc = kvm_pmu_cap.num_counters_gp;
1815
		entry->ebx = ebx.full;
1816
		break;
1817
	}
1818
	/*Add support for Centaur's CPUID instruction*/
1819
	case 0xC0000000:
1820
		/*Just support up to 0xC0000004 now*/
1821
		entry->eax = min(entry->eax, 0xC0000004);
1822
		break;
1823
	case 0xC0000001:
1824
		cpuid_entry_override(entry, CPUID_C000_0001_EDX);
1825
		break;
1826
	case 3: /* Processor serial number */
1827
	case 5: /* MONITOR/MWAIT */
1828
	case 0xC0000002:
1829
	case 0xC0000003:
1830
	case 0xC0000004:
1831
	default:
1832
		entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1833
		break;
1834
	}
1835

1836
	r = 0;
1837

1838
out:
1839
	put_cpu();
1840

1841
	return r;
1842
}
1843

1844
static int do_cpuid_func(struct kvm_cpuid_array *array, u32 func,
1845
			 unsigned int type)
1846
{
1847
	if (type == KVM_GET_EMULATED_CPUID)
1848
		return __do_cpuid_func_emulated(array, func);
1849

1850
	return __do_cpuid_func(array, func);
1851
}
1852

1853
#define CENTAUR_CPUID_SIGNATURE 0xC0000000
1854

1855
static int get_cpuid_func(struct kvm_cpuid_array *array, u32 func,
1856
			  unsigned int type)
1857
{
1858
	u32 limit;
1859
	int r;
1860

1861
	if (func == CENTAUR_CPUID_SIGNATURE &&
1862
	    boot_cpu_data.x86_vendor != X86_VENDOR_CENTAUR &&
1863
	    boot_cpu_data.x86_vendor != X86_VENDOR_ZHAOXIN)
1864
		return 0;
1865

1866
	r = do_cpuid_func(array, func, type);
1867
	if (r)
1868
		return r;
1869

1870
	limit = array->entries[array->nent - 1].eax;
1871
	for (func = func + 1; func <= limit; ++func) {
1872
		r = do_cpuid_func(array, func, type);
1873
		if (r)
1874
			break;
1875
	}
1876

1877
	return r;
1878
}
1879

1880
static bool sanity_check_entries(struct kvm_cpuid_entry2 __user *entries,
1881
				 __u32 num_entries, unsigned int ioctl_type)
1882
{
1883
	int i;
1884
	__u32 pad[3];
1885

1886
	if (ioctl_type != KVM_GET_EMULATED_CPUID)
1887
		return false;
1888

1889
	/*
1890
	 * We want to make sure that ->padding is being passed clean from
1891
	 * userspace in case we want to use it for something in the future.
1892
	 *
1893
	 * Sadly, this wasn't enforced for KVM_GET_SUPPORTED_CPUID and so we
1894
	 * have to give ourselves satisfied only with the emulated side. /me
1895
	 * sheds a tear.
1896
	 */
1897
	for (i = 0; i < num_entries; i++) {
1898
		if (copy_from_user(pad, entries[i].padding, sizeof(pad)))
1899
			return true;
1900

1901
		if (pad[0] || pad[1] || pad[2])
1902
			return true;
1903
	}
1904
	return false;
1905
}
1906

1907
int kvm_dev_ioctl_get_cpuid(struct kvm_cpuid2 *cpuid,
1908
			    struct kvm_cpuid_entry2 __user *entries,
1909
			    unsigned int type)
1910
{
1911
	static const u32 funcs[] = {
1912
		0, 0x80000000, CENTAUR_CPUID_SIGNATURE, KVM_CPUID_SIGNATURE,
1913
	};
1914

1915
	struct kvm_cpuid_array array = {
1916
		.nent = 0,
1917
	};
1918
	int r, i;
1919

1920
	if (cpuid->nent < 1)
1921
		return -E2BIG;
1922
	if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1923
		cpuid->nent = KVM_MAX_CPUID_ENTRIES;
1924

1925
	if (sanity_check_entries(entries, cpuid->nent, type))
1926
		return -EINVAL;
1927

1928
	array.entries = kvcalloc(cpuid->nent, sizeof(struct kvm_cpuid_entry2), GFP_KERNEL);
1929
	if (!array.entries)
1930
		return -ENOMEM;
1931

1932
	array.maxnent = cpuid->nent;
1933

1934
	for (i = 0; i < ARRAY_SIZE(funcs); i++) {
1935
		r = get_cpuid_func(&array, funcs[i], type);
1936
		if (r)
1937
			goto out_free;
1938
	}
1939
	cpuid->nent = array.nent;
1940

1941
	if (copy_to_user(entries, array.entries,
1942
			 array.nent * sizeof(struct kvm_cpuid_entry2)))
1943
		r = -EFAULT;
1944

1945
out_free:
1946
	kvfree(array.entries);
1947
	return r;
1948
}
1949

1950
/*
1951
 * Intel CPUID semantics treats any query for an out-of-range leaf as if the
1952
 * highest basic leaf (i.e. CPUID.0H:EAX) were requested.  AMD CPUID semantics
1953
 * returns all zeroes for any undefined leaf, whether or not the leaf is in
1954
 * range.  Centaur/VIA follows Intel semantics.
1955
 *
1956
 * A leaf is considered out-of-range if its function is higher than the maximum
1957
 * supported leaf of its associated class or if its associated class does not
1958
 * exist.
1959
 *
1960
 * There are three primary classes to be considered, with their respective
1961
 * ranges described as "<base> - <top>[,<base2> - <top2>] inclusive.  A primary
1962
 * class exists if a guest CPUID entry for its <base> leaf exists.  For a given
1963
 * class, CPUID.<base>.EAX contains the max supported leaf for the class.
1964
 *
1965
 *  - Basic:      0x00000000 - 0x3fffffff, 0x50000000 - 0x7fffffff
1966
 *  - Hypervisor: 0x40000000 - 0x4fffffff
1967
 *  - Extended:   0x80000000 - 0xbfffffff
1968
 *  - Centaur:    0xc0000000 - 0xcfffffff
1969
 *
1970
 * The Hypervisor class is further subdivided into sub-classes that each act as
1971
 * their own independent class associated with a 0x100 byte range.  E.g. if Qemu
1972
 * is advertising support for both HyperV and KVM, the resulting Hypervisor
1973
 * CPUID sub-classes are:
1974
 *
1975
 *  - HyperV:     0x40000000 - 0x400000ff
1976
 *  - KVM:        0x40000100 - 0x400001ff
1977
 */
1978
static struct kvm_cpuid_entry2 *
1979
get_out_of_range_cpuid_entry(struct kvm_vcpu *vcpu, u32 *fn_ptr, u32 index)
1980
{
1981
	struct kvm_cpuid_entry2 *basic, *class;
1982
	u32 function = *fn_ptr;
1983

1984
	basic = kvm_find_cpuid_entry(vcpu, 0);
1985
	if (!basic)
1986
		return NULL;
1987

1988
	if (is_guest_vendor_amd(basic->ebx, basic->ecx, basic->edx) ||
1989
	    is_guest_vendor_hygon(basic->ebx, basic->ecx, basic->edx))
1990
		return NULL;
1991

1992
	if (function >= 0x40000000 && function <= 0x4fffffff)
1993
		class = kvm_find_cpuid_entry(vcpu, function & 0xffffff00);
1994
	else if (function >= 0xc0000000)
1995
		class = kvm_find_cpuid_entry(vcpu, 0xc0000000);
1996
	else
1997
		class = kvm_find_cpuid_entry(vcpu, function & 0x80000000);
1998

1999
	if (class && function <= class->eax)
2000
		return NULL;
2001

2002
	/*
2003
	 * Leaf specific adjustments are also applied when redirecting to the
2004
	 * max basic entry, e.g. if the max basic leaf is 0xb but there is no
2005
	 * entry for CPUID.0xb.index (see below), then the output value for EDX
2006
	 * needs to be pulled from CPUID.0xb.1.
2007
	 */
2008
	*fn_ptr = basic->eax;
2009

2010
	/*
2011
	 * The class does not exist or the requested function is out of range;
2012
	 * the effective CPUID entry is the max basic leaf.  Note, the index of
2013
	 * the original requested leaf is observed!
2014
	 */
2015
	return kvm_find_cpuid_entry_index(vcpu, basic->eax, index);
2016
}
2017

2018
bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx,
2019
	       u32 *ecx, u32 *edx, bool exact_only)
2020
{
2021
	u32 orig_function = *eax, function = *eax, index = *ecx;
2022
	struct kvm_cpuid_entry2 *entry;
2023
	bool exact, used_max_basic = false;
2024

2025
	if (vcpu->arch.cpuid_dynamic_bits_dirty)
2026
		kvm_update_cpuid_runtime(vcpu);
2027

2028
	entry = kvm_find_cpuid_entry_index(vcpu, function, index);
2029
	exact = !!entry;
2030

2031
	if (!entry && !exact_only) {
2032
		entry = get_out_of_range_cpuid_entry(vcpu, &function, index);
2033
		used_max_basic = !!entry;
2034
	}
2035

2036
	if (entry) {
2037
		*eax = entry->eax;
2038
		*ebx = entry->ebx;
2039
		*ecx = entry->ecx;
2040
		*edx = entry->edx;
2041
		if (function == 7 && index == 0) {
2042
			u64 data;
2043
			if ((*ebx & (feature_bit(RTM) | feature_bit(HLE))) &&
2044
			    !kvm_msr_read(vcpu, MSR_IA32_TSX_CTRL, &data) &&
2045
			    (data & TSX_CTRL_CPUID_CLEAR))
2046
				*ebx &= ~(feature_bit(RTM) | feature_bit(HLE));
2047
		} else if (function == 0x80000007) {
2048
			if (kvm_hv_invtsc_suppressed(vcpu))
2049
				*edx &= ~feature_bit(CONSTANT_TSC);
2050
		} else if (IS_ENABLED(CONFIG_KVM_XEN) &&
2051
			   kvm_xen_is_tsc_leaf(vcpu, function)) {
2052
			/*
2053
			 * Update guest TSC frequency information if necessary.
2054
			 * Ignore failures, there is no sane value that can be
2055
			 * provided if KVM can't get the TSC frequency.
2056
			 */
2057
			if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu))
2058
				kvm_guest_time_update(vcpu);
2059

2060
			if (index == 1) {
2061
				*ecx = vcpu->arch.pvclock_tsc_mul;
2062
				*edx = vcpu->arch.pvclock_tsc_shift;
2063
			} else if (index == 2) {
2064
				*eax = vcpu->arch.hw_tsc_khz;
2065
			}
2066
		}
2067
	} else {
2068
		*eax = *ebx = *ecx = *edx = 0;
2069
		/*
2070
		 * When leaf 0BH or 1FH is defined, CL is pass-through
2071
		 * and EDX is always the x2APIC ID, even for undefined
2072
		 * subleaves. Index 1 will exist iff the leaf is
2073
		 * implemented, so we pass through CL iff leaf 1
2074
		 * exists. EDX can be copied from any existing index.
2075
		 */
2076
		if (function == 0xb || function == 0x1f) {
2077
			entry = kvm_find_cpuid_entry_index(vcpu, function, 1);
2078
			if (entry) {
2079
				*ecx = index & 0xff;
2080
				*edx = entry->edx;
2081
			}
2082
		}
2083
	}
2084
	trace_kvm_cpuid(orig_function, index, *eax, *ebx, *ecx, *edx, exact,
2085
			used_max_basic);
2086
	return exact;
2087
}
2088
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_cpuid);
2089

2090
int kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
2091
{
2092
	u32 eax, ebx, ecx, edx;
2093

2094
	if (cpuid_fault_enabled(vcpu) && !kvm_require_cpl(vcpu, 0))
2095
		return 1;
2096

2097
	eax = kvm_rax_read(vcpu);
2098
	ecx = kvm_rcx_read(vcpu);
2099
	kvm_cpuid(vcpu, &eax, &ebx, &ecx, &edx, false);
2100
	kvm_rax_write(vcpu, eax);
2101
	kvm_rbx_write(vcpu, ebx);
2102
	kvm_rcx_write(vcpu, ecx);
2103
	kvm_rdx_write(vcpu, edx);
2104
	return kvm_skip_emulated_instruction(vcpu);
2105
}
2106
EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_emulate_cpuid);
2107

2108