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/* SPDX-License-Identifier: GPL-2.0 */
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/******************************************************************************
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 * x86_emulate.h
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 *
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 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator.
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 *
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 * Copyright (c) 2005 Keir Fraser
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 *
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 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4
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 */
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#ifndef _ASM_X86_KVM_X86_EMULATE_H
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#define _ASM_X86_KVM_X86_EMULATE_H
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#include <asm/desc_defs.h>
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#include "fpu.h"
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18
struct x86_emulate_ctxt;
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enum x86_intercept;
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enum x86_intercept_stage;
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struct x86_exception {
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	u8 vector;
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	bool error_code_valid;
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	u16 error_code;
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	bool nested_page_fault;
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	u64 address; /* cr2 or nested page fault gpa */
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	u8 async_page_fault;
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	unsigned long exit_qualification;
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};
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/*
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 * This struct is used to carry enough information from the instruction
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 * decoder to main KVM so that a decision can be made whether the
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 * instruction needs to be intercepted or not.
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 */
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struct x86_instruction_info {
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	u8  intercept;          /* which intercept                      */
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	u8  rep_prefix;         /* rep prefix?                          */
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	u8  modrm_mod;		/* mod part of modrm			*/
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	u8  modrm_reg;          /* index of register used               */
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	u8  modrm_rm;		/* rm part of modrm			*/
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	u64 src_val;            /* value of source operand              */
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	u64 dst_val;            /* value of destination operand         */
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	u8  src_bytes;          /* size of source operand               */
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	u8  dst_bytes;          /* size of destination operand          */
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	u8  src_type;		/* type of source operand		*/
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	u8  dst_type;		/* type of destination operand		*/
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	u8  ad_bytes;           /* size of src/dst address              */
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	u64 rip;		/* rip of the instruction		*/
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	u64 next_rip;           /* rip following the instruction        */
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};
53

54
/*
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 * x86_emulate_ops:
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 *
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 * These operations represent the instruction emulator's interface to memory.
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 * There are two categories of operation: those that act on ordinary memory
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 * regions (*_std), and those that act on memory regions known to require
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 * special treatment or emulation (*_emulated).
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 *
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 * The emulator assumes that an instruction accesses only one 'emulated memory'
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 * location, that this location is the given linear faulting address (cr2), and
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 * that this is one of the instruction's data operands. Instruction fetches and
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 * stack operations are assumed never to access emulated memory. The emulator
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 * automatically deduces which operand of a string-move operation is accessing
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 * emulated memory, and assumes that the other operand accesses normal memory.
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 *
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 * NOTES:
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 *  1. The emulator isn't very smart about emulated vs. standard memory.
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 *     'Emulated memory' access addresses should be checked for sanity.
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 *     'Normal memory' accesses may fault, and the caller must arrange to
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 *     detect and handle reentrancy into the emulator via recursive faults.
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 *     Accesses may be unaligned and may cross page boundaries.
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 *  2. If the access fails (cannot emulate, or a standard access faults) then
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 *     it is up to the memop to propagate the fault to the guest VM via
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 *     some out-of-band mechanism, unknown to the emulator. The memop signals
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 *     failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will
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 *     then immediately bail.
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 *  3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only
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 *     cmpxchg8b_emulated need support 8-byte accesses.
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 *  4. The emulator cannot handle 64-bit mode emulation on an x86/32 system.
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 */
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/* Access completed successfully: continue emulation as normal. */
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#define X86EMUL_CONTINUE        0
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/* Access is unhandleable: bail from emulation and return error to caller. */
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#define X86EMUL_UNHANDLEABLE    1
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/* Terminate emulation but return success to the caller. */
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#define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */
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#define X86EMUL_RETRY_INSTR     3 /* retry the instruction for some reason */
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#define X86EMUL_CMPXCHG_FAILED  4 /* cmpxchg did not see expected value */
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#define X86EMUL_IO_NEEDED       5 /* IO is needed to complete emulation */
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#define X86EMUL_INTERCEPTED     6 /* Intercepted by nested VMCB/VMCS */
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/* Emulation during event vectoring is unhandleable. */
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#define X86EMUL_UNHANDLEABLE_VECTORING	7
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/* x86-specific emulation flags */
98
#define X86EMUL_F_WRITE			BIT(0)
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#define X86EMUL_F_FETCH			BIT(1)
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#define X86EMUL_F_IMPLICIT		BIT(2)
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#define X86EMUL_F_INVLPG		BIT(3)
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#define X86EMUL_F_MSR			BIT(4)
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#define X86EMUL_F_DT_LOAD		BIT(5)
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struct x86_emulate_ops {
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	void (*vm_bugged)(struct x86_emulate_ctxt *ctxt);
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	/*
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	 * read_gpr: read a general purpose register (rax - r15)
109
	 *
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	 * @reg: gpr number.
111
	 */
112
	ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg);
113
	/*
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	 * write_gpr: write a general purpose register (rax - r15)
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	 *
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	 * @reg: gpr number.
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	 * @val: value to write.
118
	 */
119
	void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val);
120
	/*
121
	 * read_std: Read bytes of standard (non-emulated/special) memory.
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	 *           Used for descriptor reading.
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	 *  @addr:  [IN ] Linear address from which to read.
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	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
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	 *  @bytes: [IN ] Number of bytes to read from memory.
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	 *  @system:[IN ] Whether the access is forced to be at CPL0.
127
	 */
128
	int (*read_std)(struct x86_emulate_ctxt *ctxt,
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			unsigned long addr, void *val,
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			unsigned int bytes,
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			struct x86_exception *fault, bool system);
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133
	/*
134
	 * write_std: Write bytes of standard (non-emulated/special) memory.
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	 *            Used for descriptor writing.
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	 *  @addr:  [IN ] Linear address to which to write.
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	 *  @val:   [OUT] Value write to memory, zero-extended to 'u_long'.
138
	 *  @bytes: [IN ] Number of bytes to write to memory.
139
	 *  @system:[IN ] Whether the access is forced to be at CPL0.
140
	 */
141
	int (*write_std)(struct x86_emulate_ctxt *ctxt,
142
			 unsigned long addr, void *val, unsigned int bytes,
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			 struct x86_exception *fault, bool system);
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	/*
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	 * fetch: Read bytes of standard (non-emulated/special) memory.
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	 *        Used for instruction fetch.
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	 *  @addr:  [IN ] Linear address from which to read.
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	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
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	 *  @bytes: [IN ] Number of bytes to read from memory.
150
	 */
151
	int (*fetch)(struct x86_emulate_ctxt *ctxt,
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		     unsigned long addr, void *val, unsigned int bytes,
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		     struct x86_exception *fault);
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155
	/*
156
	 * read_emulated: Read bytes from emulated/special memory area.
157
	 *  @addr:  [IN ] Linear address from which to read.
158
	 *  @val:   [OUT] Value read from memory, zero-extended to 'u_long'.
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	 *  @bytes: [IN ] Number of bytes to read from memory.
160
	 */
161
	int (*read_emulated)(struct x86_emulate_ctxt *ctxt,
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			     unsigned long addr, void *val, unsigned int bytes,
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			     struct x86_exception *fault);
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165
	/*
166
	 * write_emulated: Write bytes to emulated/special memory area.
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	 *  @addr:  [IN ] Linear address to which to write.
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	 *  @val:   [IN ] Value to write to memory (low-order bytes used as
169
	 *                required).
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	 *  @bytes: [IN ] Number of bytes to write to memory.
171
	 */
172
	int (*write_emulated)(struct x86_emulate_ctxt *ctxt,
173
			      unsigned long addr, const void *val,
174
			      unsigned int bytes,
175
			      struct x86_exception *fault);
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177
	/*
178
	 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an
179
	 *                   emulated/special memory area.
180
	 *  @addr:  [IN ] Linear address to access.
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	 *  @old:   [IN ] Value expected to be current at @addr.
182
	 *  @new:   [IN ] Value to write to @addr.
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	 *  @bytes: [IN ] Number of bytes to access using CMPXCHG.
184
	 */
185
	int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt,
186
				unsigned long addr,
187
				const void *old,
188
				const void *new,
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				unsigned int bytes,
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				struct x86_exception *fault);
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	void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr);
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193
	int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt,
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			       int size, unsigned short port, void *val,
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			       unsigned int count);
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197
	int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt,
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				int size, unsigned short port, const void *val,
199
				unsigned int count);
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201
	bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector,
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			    struct desc_struct *desc, u32 *base3, int seg);
203
	void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector,
204
			    struct desc_struct *desc, u32 base3, int seg);
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	unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt,
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						 int seg);
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	void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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	void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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	void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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	void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt);
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	ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr);
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	int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val);
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	int (*cpl)(struct x86_emulate_ctxt *ctxt);
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	ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr);
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	int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value);
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	int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data);
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	int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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	int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata);
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	int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc);
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	int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata);
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	void (*halt)(struct x86_emulate_ctxt *ctxt);
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	void (*wbinvd)(struct x86_emulate_ctxt *ctxt);
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	int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt);
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	int (*intercept)(struct x86_emulate_ctxt *ctxt,
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			 struct x86_instruction_info *info,
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			 enum x86_intercept_stage stage);
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228
	bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx,
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			  u32 *ecx, u32 *edx, bool exact_only);
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	bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt);
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	bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt);
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	bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt);
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	bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt);
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235
	void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked);
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	bool (*is_smm)(struct x86_emulate_ctxt *ctxt);
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	int (*leave_smm)(struct x86_emulate_ctxt *ctxt);
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	void (*triple_fault)(struct x86_emulate_ctxt *ctxt);
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	int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr);
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242
	gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr,
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				   unsigned int flags);
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245
	bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr,
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				  unsigned int flags);
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};
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/* Type, address-of, and value of an instruction's operand. */
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struct operand {
251
	enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type;
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	unsigned int bytes;
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	unsigned int count;
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	union {
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		unsigned long orig_val;
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		u64 orig_val64;
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	};
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	union {
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		unsigned long *reg;
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		struct segmented_address {
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			ulong ea;
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			unsigned seg;
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		} mem;
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		unsigned xmm;
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		unsigned mm;
266
	} addr;
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	union {
268
		unsigned long val;
269
		u64 val64;
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		char valptr[sizeof(sse128_t)];
271
		sse128_t vec_val;
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		u64 mm_val;
273
		void *data;
274
	};
275
};
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277
#define X86_MAX_INSTRUCTION_LENGTH	15
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279
struct fetch_cache {
280
	u8 data[X86_MAX_INSTRUCTION_LENGTH];
281
	u8 *ptr;
282
	u8 *end;
283
};
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285
struct read_cache {
286
	u8 data[1024];
287
	unsigned long pos;
288
	unsigned long end;
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};
290

291
/* Execution mode, passed to the emulator. */
292
enum x86emul_mode {
293
	X86EMUL_MODE_REAL,	/* Real mode.             */
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	X86EMUL_MODE_VM86,	/* Virtual 8086 mode.     */
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	X86EMUL_MODE_PROT16,	/* 16-bit protected mode. */
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	X86EMUL_MODE_PROT32,	/* 32-bit protected mode. */
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	X86EMUL_MODE_PROT64,	/* 64-bit (long) mode.    */
298
};
299

300
/*
301
 * fastop functions are declared as taking a never-defined fastop parameter,
302
 * so they can't be called from C directly.
303
 */
304
struct fastop;
305

306
typedef void (*fastop_t)(struct fastop *);
307

308
/*
309
 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP.  RIP is
310
 * tracked/accessed via _eip, and except for RIP relative addressing, which
311
 * also uses _eip, RIP cannot be a register operand nor can it be an operand in
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 * a ModRM or SIB byte.
313
 */
314
#ifdef CONFIG_X86_64
315
#define NR_EMULATOR_GPRS	16
316
#else
317
#define NR_EMULATOR_GPRS	8
318
#endif
319

320
struct x86_emulate_ctxt {
321
	void *vcpu;
322
	const struct x86_emulate_ops *ops;
323

324
	/* Register state before/after emulation. */
325
	unsigned long eflags;
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	unsigned long eip; /* eip before instruction emulation */
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	/* Emulated execution mode, represented by an X86EMUL_MODE value. */
328
	enum x86emul_mode mode;
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330
	/* interruptibility state, as a result of execution of STI or MOV SS */
331
	int interruptibility;
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333
	bool perm_ok; /* do not check permissions if true */
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	bool tf;	/* TF value before instruction (after for syscall/sysret) */
335

336
	bool have_exception;
337
	struct x86_exception exception;
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339
	/* GPA available */
340
	bool gpa_available;
341
	gpa_t gpa_val;
342

343
	/*
344
	 * decode cache
345
	 */
346

347
	/* current opcode length in bytes */
348
	u8 opcode_len;
349
	u8 b;
350
	u8 intercept;
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	u8 op_bytes;
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	u8 ad_bytes;
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	union {
354
		int (*execute)(struct x86_emulate_ctxt *ctxt);
355
		fastop_t fop;
356
	};
357
	int (*check_perm)(struct x86_emulate_ctxt *ctxt);
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359
	bool rip_relative;
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	u8 rex_prefix;
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	u8 lock_prefix;
362
	u8 rep_prefix;
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	/* bitmaps of registers in _regs[] that can be read */
364
	u16 regs_valid;
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	/* bitmaps of registers in _regs[] that have been written */
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	u16 regs_dirty;
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	/* modrm */
368
	u8 modrm;
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	u8 modrm_mod;
370
	u8 modrm_reg;
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	u8 modrm_rm;
372
	u8 modrm_seg;
373
	u8 seg_override;
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	u64 d;
375
	unsigned long _eip;
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377
	/* Here begins the usercopy section. */
378
	struct operand src;
379
	struct operand src2;
380
	struct operand dst;
381
	struct operand memop;
382
	unsigned long _regs[NR_EMULATOR_GPRS];
383
	struct operand *memopp;
384
	struct fetch_cache fetch;
385
	struct read_cache io_read;
386
	struct read_cache mem_read;
387
	bool is_branch;
388
};
389

390
#define KVM_EMULATOR_BUG_ON(cond, ctxt)		\
391
({						\
392
	int __ret = (cond);			\
393
						\
394
	if (WARN_ON_ONCE(__ret))		\
395
		ctxt->ops->vm_bugged(ctxt);	\
396
	unlikely(__ret);			\
397
})
398

399
/* Repeat String Operation Prefix */
400
#define REPE_PREFIX	0xf3
401
#define REPNE_PREFIX	0xf2
402

403
/* CPUID vendors */
404
#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541
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#define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163
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#define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65
407

408
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41
409
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574
410
#define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273
411

412
#define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948
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#define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975
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#define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e
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416
#define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547
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#define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e
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#define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69
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420
#define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543
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#define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561
422
#define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561
423

424
static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx)
425
{
426
	return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx &&
427
	       ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx &&
428
	       edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx;
429
}
430

431
static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx)
432
{
433
	return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx &&
434
		ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx &&
435
		edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) ||
436
	       (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx &&
437
		ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx &&
438
		edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx);
439
}
440

441
static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx)
442
{
443
	return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx &&
444
	       ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx &&
445
	       edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx;
446
}
447

448
enum x86_intercept_stage {
449
	X86_ICTP_NONE = 0,   /* Allow zero-init to not match anything */
450
	X86_ICPT_PRE_EXCEPT,
451
	X86_ICPT_POST_EXCEPT,
452
	X86_ICPT_POST_MEMACCESS,
453
};
454

455
enum x86_intercept {
456
	x86_intercept_none,
457
	x86_intercept_cr_read,
458
	x86_intercept_cr_write,
459
	x86_intercept_clts,
460
	x86_intercept_lmsw,
461
	x86_intercept_smsw,
462
	x86_intercept_dr_read,
463
	x86_intercept_dr_write,
464
	x86_intercept_lidt,
465
	x86_intercept_sidt,
466
	x86_intercept_lgdt,
467
	x86_intercept_sgdt,
468
	x86_intercept_lldt,
469
	x86_intercept_sldt,
470
	x86_intercept_ltr,
471
	x86_intercept_str,
472
	x86_intercept_rdtsc,
473
	x86_intercept_rdpmc,
474
	x86_intercept_pushf,
475
	x86_intercept_popf,
476
	x86_intercept_cpuid,
477
	x86_intercept_rsm,
478
	x86_intercept_iret,
479
	x86_intercept_intn,
480
	x86_intercept_invd,
481
	x86_intercept_pause,
482
	x86_intercept_hlt,
483
	x86_intercept_invlpg,
484
	x86_intercept_invlpga,
485
	x86_intercept_vmrun,
486
	x86_intercept_vmload,
487
	x86_intercept_vmsave,
488
	x86_intercept_vmmcall,
489
	x86_intercept_stgi,
490
	x86_intercept_clgi,
491
	x86_intercept_skinit,
492
	x86_intercept_rdtscp,
493
	x86_intercept_rdpid,
494
	x86_intercept_icebp,
495
	x86_intercept_wbinvd,
496
	x86_intercept_monitor,
497
	x86_intercept_mwait,
498
	x86_intercept_rdmsr,
499
	x86_intercept_wrmsr,
500
	x86_intercept_in,
501
	x86_intercept_ins,
502
	x86_intercept_out,
503
	x86_intercept_outs,
504
	x86_intercept_xsetbv,
505

506
	nr_x86_intercepts
507
};
508

509
/* Host execution mode. */
510
#if defined(CONFIG_X86_32)
511
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32
512
#elif defined(CONFIG_X86_64)
513
#define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64
514
#endif
515

516
int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type);
517
bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt);
518
#define EMULATION_FAILED -1
519
#define EMULATION_OK 0
520
#define EMULATION_RESTART 1
521
#define EMULATION_INTERCEPTED 2
522
void init_decode_cache(struct x86_emulate_ctxt *ctxt);
523
int x86_emulate_insn(struct x86_emulate_ctxt *ctxt, bool check_intercepts);
524
int emulator_task_switch(struct x86_emulate_ctxt *ctxt,
525
			 u16 tss_selector, int idt_index, int reason,
526
			 bool has_error_code, u32 error_code);
527
int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq);
528
void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt);
529
void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt);
530
bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt);
531

532
static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr)
533
{
534
	if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
535
		nr &= NR_EMULATOR_GPRS - 1;
536

537
	if (!(ctxt->regs_valid & (1 << nr))) {
538
		ctxt->regs_valid |= 1 << nr;
539
		ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr);
540
	}
541
	return ctxt->_regs[nr];
542
}
543

544
static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr)
545
{
546
	if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt))
547
		nr &= NR_EMULATOR_GPRS - 1;
548

549
	BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
550
	BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS);
551

552
	ctxt->regs_valid |= 1 << nr;
553
	ctxt->regs_dirty |= 1 << nr;
554
	return &ctxt->_regs[nr];
555
}
556

557
static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr)
558
{
559
	reg_read(ctxt, nr);
560
	return reg_write(ctxt, nr);
561
}
562

563
#endif /* _ASM_X86_KVM_X86_EMULATE_H */
564

565