1
// SPDX-License-Identifier: GPL-2.0-only
2
/*
3
 * Kernel-based Virtual Machine driver for Linux
4
 *
5
 * AMD SVM support
6
 *
7
 * Copyright (C) 2006 Qumranet, Inc.
8
 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
9
 *
10
 * Authors:
11
 *   Yaniv Kamay  <[email protected]>
12
 *   Avi Kivity   <[email protected]>
13
 */
14

15
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16

17
#include <linux/kvm_types.h>
18
#include <linux/kvm_host.h>
19
#include <linux/kernel.h>
20

21
#include <asm/msr-index.h>
22
#include <asm/debugreg.h>
23

24
#include "kvm_emulate.h"
25
#include "trace.h"
26
#include "mmu.h"
27
#include "x86.h"
28
#include "smm.h"
29
#include "cpuid.h"
30
#include "lapic.h"
31
#include "svm.h"
32
#include "hyperv.h"
33

34
#define CC KVM_NESTED_VMENTER_CONSISTENCY_CHECK
35

36
static void nested_svm_inject_npf_exit(struct kvm_vcpu *vcpu,
37
				       struct x86_exception *fault)
38
{
39
	struct vcpu_svm *svm = to_svm(vcpu);
40
	struct vmcb *vmcb = svm->vmcb;
41

42
	if (vmcb->control.exit_code != SVM_EXIT_NPF) {
43
		/*
44
		 * TODO: track the cause of the nested page fault, and
45
		 * correctly fill in the high bits of exit_info_1.
46
		 */
47
		vmcb->control.exit_code = SVM_EXIT_NPF;
48
		vmcb->control.exit_code_hi = 0;
49
		vmcb->control.exit_info_1 = (1ULL << 32);
50
		vmcb->control.exit_info_2 = fault->address;
51
	}
52

53
	vmcb->control.exit_info_1 &= ~0xffffffffULL;
54
	vmcb->control.exit_info_1 |= fault->error_code;
55

56
	nested_svm_vmexit(svm);
57
}
58

59
static u64 nested_svm_get_tdp_pdptr(struct kvm_vcpu *vcpu, int index)
60
{
61
	struct vcpu_svm *svm = to_svm(vcpu);
62
	u64 cr3 = svm->nested.ctl.nested_cr3;
63
	u64 pdpte;
64
	int ret;
65

66
	/*
67
	 * Note, nCR3 is "assumed" to be 32-byte aligned, i.e. the CPU ignores
68
	 * nCR3[4:0] when loading PDPTEs from memory.
69
	 */
70
	ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(cr3), &pdpte,
71
				       (cr3 & GENMASK(11, 5)) + index * 8, 8);
72
	if (ret)
73
		return 0;
74
	return pdpte;
75
}
76

77
static unsigned long nested_svm_get_tdp_cr3(struct kvm_vcpu *vcpu)
78
{
79
	struct vcpu_svm *svm = to_svm(vcpu);
80

81
	return svm->nested.ctl.nested_cr3;
82
}
83

84
static void nested_svm_init_mmu_context(struct kvm_vcpu *vcpu)
85
{
86
	struct vcpu_svm *svm = to_svm(vcpu);
87

88
	WARN_ON(mmu_is_nested(vcpu));
89

90
	vcpu->arch.mmu = &vcpu->arch.guest_mmu;
91

92
	/*
93
	 * The NPT format depends on L1's CR4 and EFER, which is in vmcb01.  Note,
94
	 * when called via KVM_SET_NESTED_STATE, that state may _not_ match current
95
	 * vCPU state.  CR0.WP is explicitly ignored, while CR0.PG is required.
96
	 */
97
	kvm_init_shadow_npt_mmu(vcpu, X86_CR0_PG, svm->vmcb01.ptr->save.cr4,
98
				svm->vmcb01.ptr->save.efer,
99
				svm->nested.ctl.nested_cr3);
100
	vcpu->arch.mmu->get_guest_pgd     = nested_svm_get_tdp_cr3;
101
	vcpu->arch.mmu->get_pdptr         = nested_svm_get_tdp_pdptr;
102
	vcpu->arch.mmu->inject_page_fault = nested_svm_inject_npf_exit;
103
	vcpu->arch.walk_mmu              = &vcpu->arch.nested_mmu;
104
}
105

106
static void nested_svm_uninit_mmu_context(struct kvm_vcpu *vcpu)
107
{
108
	vcpu->arch.mmu = &vcpu->arch.root_mmu;
109
	vcpu->arch.walk_mmu = &vcpu->arch.root_mmu;
110
}
111

112
static bool nested_vmcb_needs_vls_intercept(struct vcpu_svm *svm)
113
{
114
	if (!guest_cpu_cap_has(&svm->vcpu, X86_FEATURE_V_VMSAVE_VMLOAD))
115
		return true;
116

117
	if (!nested_npt_enabled(svm))
118
		return true;
119

120
	if (!(svm->nested.ctl.virt_ext & VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK))
121
		return true;
122

123
	return false;
124
}
125

126
void recalc_intercepts(struct vcpu_svm *svm)
127
{
128
	struct vmcb_control_area *c, *h;
129
	struct vmcb_ctrl_area_cached *g;
130
	unsigned int i;
131

132
	vmcb_mark_dirty(svm->vmcb, VMCB_INTERCEPTS);
133

134
	if (!is_guest_mode(&svm->vcpu))
135
		return;
136

137
	c = &svm->vmcb->control;
138
	h = &svm->vmcb01.ptr->control;
139
	g = &svm->nested.ctl;
140

141
	for (i = 0; i < MAX_INTERCEPT; i++)
142
		c->intercepts[i] = h->intercepts[i];
143

144
	if (g->int_ctl & V_INTR_MASKING_MASK) {
145
		/*
146
		 * If L2 is active and V_INTR_MASKING is enabled in vmcb12,
147
		 * disable intercept of CR8 writes as L2's CR8 does not affect
148
		 * any interrupt KVM may want to inject.
149
		 *
150
		 * Similarly, disable intercept of virtual interrupts (used to
151
		 * detect interrupt windows) if the saved RFLAGS.IF is '0', as
152
		 * the effective RFLAGS.IF for L1 interrupts will never be set
153
		 * while L2 is running (L2's RFLAGS.IF doesn't affect L1 IRQs).
154
		 */
155
		vmcb_clr_intercept(c, INTERCEPT_CR8_WRITE);
156
		if (!(svm->vmcb01.ptr->save.rflags & X86_EFLAGS_IF))
157
			vmcb_clr_intercept(c, INTERCEPT_VINTR);
158
	}
159

160
	/*
161
	 * We want to see VMMCALLs from a nested guest only when Hyper-V L2 TLB
162
	 * flush feature is enabled.
163
	 */
164
	if (!nested_svm_l2_tlb_flush_enabled(&svm->vcpu))
165
		vmcb_clr_intercept(c, INTERCEPT_VMMCALL);
166

167
	for (i = 0; i < MAX_INTERCEPT; i++)
168
		c->intercepts[i] |= g->intercepts[i];
169

170
	/* If SMI is not intercepted, ignore guest SMI intercept as well  */
171
	if (!intercept_smi)
172
		vmcb_clr_intercept(c, INTERCEPT_SMI);
173

174
	if (nested_vmcb_needs_vls_intercept(svm)) {
175
		/*
176
		 * If the virtual VMLOAD/VMSAVE is not enabled for the L2,
177
		 * we must intercept these instructions to correctly
178
		 * emulate them in case L1 doesn't intercept them.
179
		 */
180
		vmcb_set_intercept(c, INTERCEPT_VMLOAD);
181
		vmcb_set_intercept(c, INTERCEPT_VMSAVE);
182
	} else {
183
		WARN_ON(!(c->virt_ext & VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK));
184
	}
185
}
186

187
/*
188
 * This array (and its actual size) holds the set of offsets (indexing by chunk
189
 * size) to process when merging vmcb12's MSRPM with vmcb01's MSRPM.  Note, the
190
 * set of MSRs for which interception is disabled in vmcb01 is per-vCPU, e.g.
191
 * based on CPUID features.  This array only tracks MSRs that *might* be passed
192
 * through to the guest.
193
 *
194
 * Hardcode the capacity of the array based on the maximum number of _offsets_.
195
 * MSRs are batched together, so there are fewer offsets than MSRs.
196
 */
197
static int nested_svm_msrpm_merge_offsets[7] __ro_after_init;
198
static int nested_svm_nr_msrpm_merge_offsets __ro_after_init;
199
typedef unsigned long nsvm_msrpm_merge_t;
200

201
int __init nested_svm_init_msrpm_merge_offsets(void)
202
{
203
	static const u32 merge_msrs[] __initconst = {
204
		MSR_STAR,
205
		MSR_IA32_SYSENTER_CS,
206
		MSR_IA32_SYSENTER_EIP,
207
		MSR_IA32_SYSENTER_ESP,
208
	#ifdef CONFIG_X86_64
209
		MSR_GS_BASE,
210
		MSR_FS_BASE,
211
		MSR_KERNEL_GS_BASE,
212
		MSR_LSTAR,
213
		MSR_CSTAR,
214
		MSR_SYSCALL_MASK,
215
	#endif
216
		MSR_IA32_SPEC_CTRL,
217
		MSR_IA32_PRED_CMD,
218
		MSR_IA32_FLUSH_CMD,
219
		MSR_IA32_APERF,
220
		MSR_IA32_MPERF,
221
		MSR_IA32_LASTBRANCHFROMIP,
222
		MSR_IA32_LASTBRANCHTOIP,
223
		MSR_IA32_LASTINTFROMIP,
224
		MSR_IA32_LASTINTTOIP,
225
	};
226
	int i, j;
227

228
	for (i = 0; i < ARRAY_SIZE(merge_msrs); i++) {
229
		int bit_nr = svm_msrpm_bit_nr(merge_msrs[i]);
230
		u32 offset;
231

232
		if (WARN_ON(bit_nr < 0))
233
			return -EIO;
234

235
		/*
236
		 * Merging is done in chunks to reduce the number of accesses
237
		 * to L1's bitmap.
238
		 */
239
		offset = bit_nr / BITS_PER_BYTE / sizeof(nsvm_msrpm_merge_t);
240

241
		for (j = 0; j < nested_svm_nr_msrpm_merge_offsets; j++) {
242
			if (nested_svm_msrpm_merge_offsets[j] == offset)
243
				break;
244
		}
245

246
		if (j < nested_svm_nr_msrpm_merge_offsets)
247
			continue;
248

249
		if (WARN_ON(j >= ARRAY_SIZE(nested_svm_msrpm_merge_offsets)))
250
			return -EIO;
251

252
		nested_svm_msrpm_merge_offsets[j] = offset;
253
		nested_svm_nr_msrpm_merge_offsets++;
254
	}
255

256
	return 0;
257
}
258

259
/*
260
 * Merge L0's (KVM) and L1's (Nested VMCB) MSR permission bitmaps. The function
261
 * is optimized in that it only merges the parts where KVM MSR permission bitmap
262
 * may contain zero bits.
263
 */
264
static bool nested_svm_merge_msrpm(struct kvm_vcpu *vcpu)
265
{
266
	struct vcpu_svm *svm = to_svm(vcpu);
267
	nsvm_msrpm_merge_t *msrpm02 = svm->nested.msrpm;
268
	nsvm_msrpm_merge_t *msrpm01 = svm->msrpm;
269
	int i;
270

271
	/*
272
	 * MSR bitmap update can be skipped when:
273
	 * - MSR bitmap for L1 hasn't changed.
274
	 * - Nested hypervisor (L1) is attempting to launch the same L2 as
275
	 *   before.
276
	 * - Nested hypervisor (L1) is using Hyper-V emulation interface and
277
	 * tells KVM (L0) there were no changes in MSR bitmap for L2.
278
	 */
279
#ifdef CONFIG_KVM_HYPERV
280
	if (!svm->nested.force_msr_bitmap_recalc) {
281
		struct hv_vmcb_enlightenments *hve = &svm->nested.ctl.hv_enlightenments;
282

283
		if (kvm_hv_hypercall_enabled(vcpu) &&
284
		    hve->hv_enlightenments_control.msr_bitmap &&
285
		    (svm->nested.ctl.clean & BIT(HV_VMCB_NESTED_ENLIGHTENMENTS)))
286
			goto set_msrpm_base_pa;
287
	}
288
#endif
289

290
	if (!(vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_MSR_PROT)))
291
		return true;
292

293
	for (i = 0; i < nested_svm_nr_msrpm_merge_offsets; i++) {
294
		const int p = nested_svm_msrpm_merge_offsets[i];
295
		nsvm_msrpm_merge_t l1_val;
296
		gpa_t gpa;
297

298
		gpa = svm->nested.ctl.msrpm_base_pa + (p * sizeof(l1_val));
299

300
		if (kvm_vcpu_read_guest(vcpu, gpa, &l1_val, sizeof(l1_val)))
301
			return false;
302

303
		msrpm02[p] = msrpm01[p] | l1_val;
304
	}
305

306
	svm->nested.force_msr_bitmap_recalc = false;
307

308
#ifdef CONFIG_KVM_HYPERV
309
set_msrpm_base_pa:
310
#endif
311
	svm->vmcb->control.msrpm_base_pa = __sme_set(__pa(svm->nested.msrpm));
312

313
	return true;
314
}
315

316
/*
317
 * Bits 11:0 of bitmap address are ignored by hardware
318
 */
319
static bool nested_svm_check_bitmap_pa(struct kvm_vcpu *vcpu, u64 pa, u32 size)
320
{
321
	u64 addr = PAGE_ALIGN(pa);
322

323
	return kvm_vcpu_is_legal_gpa(vcpu, addr) &&
324
	    kvm_vcpu_is_legal_gpa(vcpu, addr + size - 1);
325
}
326

327
static bool __nested_vmcb_check_controls(struct kvm_vcpu *vcpu,
328
					 struct vmcb_ctrl_area_cached *control)
329
{
330
	if (CC(!vmcb12_is_intercept(control, INTERCEPT_VMRUN)))
331
		return false;
332

333
	if (CC(control->asid == 0))
334
		return false;
335

336
	if (CC((control->nested_ctl & SVM_NESTED_CTL_NP_ENABLE) && !npt_enabled))
337
		return false;
338

339
	if (CC(!nested_svm_check_bitmap_pa(vcpu, control->msrpm_base_pa,
340
					   MSRPM_SIZE)))
341
		return false;
342
	if (CC(!nested_svm_check_bitmap_pa(vcpu, control->iopm_base_pa,
343
					   IOPM_SIZE)))
344
		return false;
345

346
	if (CC((control->int_ctl & V_NMI_ENABLE_MASK) &&
347
	       !vmcb12_is_intercept(control, INTERCEPT_NMI))) {
348
		return false;
349
	}
350

351
	return true;
352
}
353

354
/* Common checks that apply to both L1 and L2 state.  */
355
static bool __nested_vmcb_check_save(struct kvm_vcpu *vcpu,
356
				     struct vmcb_save_area_cached *save)
357
{
358
	if (CC(!(save->efer & EFER_SVME)))
359
		return false;
360

361
	if (CC((save->cr0 & X86_CR0_CD) == 0 && (save->cr0 & X86_CR0_NW)) ||
362
	    CC(save->cr0 & ~0xffffffffULL))
363
		return false;
364

365
	if (CC(!kvm_dr6_valid(save->dr6)) || CC(!kvm_dr7_valid(save->dr7)))
366
		return false;
367

368
	/*
369
	 * These checks are also performed by KVM_SET_SREGS,
370
	 * except that EFER.LMA is not checked by SVM against
371
	 * CR0.PG && EFER.LME.
372
	 */
373
	if ((save->efer & EFER_LME) && (save->cr0 & X86_CR0_PG)) {
374
		if (CC(!(save->cr4 & X86_CR4_PAE)) ||
375
		    CC(!(save->cr0 & X86_CR0_PE)) ||
376
		    CC(!kvm_vcpu_is_legal_cr3(vcpu, save->cr3)))
377
			return false;
378
	}
379

380
	/* Note, SVM doesn't have any additional restrictions on CR4. */
381
	if (CC(!__kvm_is_valid_cr4(vcpu, save->cr4)))
382
		return false;
383

384
	if (CC(!kvm_valid_efer(vcpu, save->efer)))
385
		return false;
386

387
	return true;
388
}
389

390
static bool nested_vmcb_check_save(struct kvm_vcpu *vcpu)
391
{
392
	struct vcpu_svm *svm = to_svm(vcpu);
393
	struct vmcb_save_area_cached *save = &svm->nested.save;
394

395
	return __nested_vmcb_check_save(vcpu, save);
396
}
397

398
static bool nested_vmcb_check_controls(struct kvm_vcpu *vcpu)
399
{
400
	struct vcpu_svm *svm = to_svm(vcpu);
401
	struct vmcb_ctrl_area_cached *ctl = &svm->nested.ctl;
402

403
	return __nested_vmcb_check_controls(vcpu, ctl);
404
}
405

406
static
407
void __nested_copy_vmcb_control_to_cache(struct kvm_vcpu *vcpu,
408
					 struct vmcb_ctrl_area_cached *to,
409
					 struct vmcb_control_area *from)
410
{
411
	unsigned int i;
412

413
	for (i = 0; i < MAX_INTERCEPT; i++)
414
		to->intercepts[i] = from->intercepts[i];
415

416
	to->iopm_base_pa        = from->iopm_base_pa;
417
	to->msrpm_base_pa       = from->msrpm_base_pa;
418
	to->tsc_offset          = from->tsc_offset;
419
	to->tlb_ctl             = from->tlb_ctl;
420
	to->int_ctl             = from->int_ctl;
421
	to->int_vector          = from->int_vector;
422
	to->int_state           = from->int_state;
423
	to->exit_code           = from->exit_code;
424
	to->exit_code_hi        = from->exit_code_hi;
425
	to->exit_info_1         = from->exit_info_1;
426
	to->exit_info_2         = from->exit_info_2;
427
	to->exit_int_info       = from->exit_int_info;
428
	to->exit_int_info_err   = from->exit_int_info_err;
429
	to->nested_ctl          = from->nested_ctl;
430
	to->event_inj           = from->event_inj;
431
	to->event_inj_err       = from->event_inj_err;
432
	to->next_rip            = from->next_rip;
433
	to->nested_cr3          = from->nested_cr3;
434
	to->virt_ext            = from->virt_ext;
435
	to->pause_filter_count  = from->pause_filter_count;
436
	to->pause_filter_thresh = from->pause_filter_thresh;
437

438
	/* Copy asid here because nested_vmcb_check_controls will check it.  */
439
	to->asid           = from->asid;
440
	to->msrpm_base_pa &= ~0x0fffULL;
441
	to->iopm_base_pa  &= ~0x0fffULL;
442

443
#ifdef CONFIG_KVM_HYPERV
444
	/* Hyper-V extensions (Enlightened VMCB) */
445
	if (kvm_hv_hypercall_enabled(vcpu)) {
446
		to->clean = from->clean;
447
		memcpy(&to->hv_enlightenments, &from->hv_enlightenments,
448
		       sizeof(to->hv_enlightenments));
449
	}
450
#endif
451
}
452

453
void nested_copy_vmcb_control_to_cache(struct vcpu_svm *svm,
454
				       struct vmcb_control_area *control)
455
{
456
	__nested_copy_vmcb_control_to_cache(&svm->vcpu, &svm->nested.ctl, control);
457
}
458

459
static void __nested_copy_vmcb_save_to_cache(struct vmcb_save_area_cached *to,
460
					     struct vmcb_save_area *from)
461
{
462
	/*
463
	 * Copy only fields that are validated, as we need them
464
	 * to avoid TOC/TOU races.
465
	 */
466
	to->efer = from->efer;
467
	to->cr0 = from->cr0;
468
	to->cr3 = from->cr3;
469
	to->cr4 = from->cr4;
470

471
	to->dr6 = from->dr6;
472
	to->dr7 = from->dr7;
473
}
474

475
void nested_copy_vmcb_save_to_cache(struct vcpu_svm *svm,
476
				    struct vmcb_save_area *save)
477
{
478
	__nested_copy_vmcb_save_to_cache(&svm->nested.save, save);
479
}
480

481
/*
482
 * Synchronize fields that are written by the processor, so that
483
 * they can be copied back into the vmcb12.
484
 */
485
void nested_sync_control_from_vmcb02(struct vcpu_svm *svm)
486
{
487
	u32 mask;
488
	svm->nested.ctl.event_inj      = svm->vmcb->control.event_inj;
489
	svm->nested.ctl.event_inj_err  = svm->vmcb->control.event_inj_err;
490

491
	/* Only a few fields of int_ctl are written by the processor.  */
492
	mask = V_IRQ_MASK | V_TPR_MASK;
493
	/*
494
	 * Don't sync vmcb02 V_IRQ back to vmcb12 if KVM (L0) is intercepting
495
	 * virtual interrupts in order to request an interrupt window, as KVM
496
	 * has usurped vmcb02's int_ctl.  If an interrupt window opens before
497
	 * the next VM-Exit, svm_clear_vintr() will restore vmcb12's int_ctl.
498
	 * If no window opens, V_IRQ will be correctly preserved in vmcb12's
499
	 * int_ctl (because it was never recognized while L2 was running).
500
	 */
501
	if (svm_is_intercept(svm, INTERCEPT_VINTR) &&
502
	    !test_bit(INTERCEPT_VINTR, (unsigned long *)svm->nested.ctl.intercepts))
503
		mask &= ~V_IRQ_MASK;
504

505
	if (nested_vgif_enabled(svm))
506
		mask |= V_GIF_MASK;
507

508
	if (nested_vnmi_enabled(svm))
509
		mask |= V_NMI_BLOCKING_MASK | V_NMI_PENDING_MASK;
510

511
	svm->nested.ctl.int_ctl        &= ~mask;
512
	svm->nested.ctl.int_ctl        |= svm->vmcb->control.int_ctl & mask;
513
}
514

515
/*
516
 * Transfer any event that L0 or L1 wanted to inject into L2 to
517
 * EXIT_INT_INFO.
518
 */
519
static void nested_save_pending_event_to_vmcb12(struct vcpu_svm *svm,
520
						struct vmcb *vmcb12)
521
{
522
	struct kvm_vcpu *vcpu = &svm->vcpu;
523
	u32 exit_int_info = 0;
524
	unsigned int nr;
525

526
	if (vcpu->arch.exception.injected) {
527
		nr = vcpu->arch.exception.vector;
528
		exit_int_info = nr | SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT;
529

530
		if (vcpu->arch.exception.has_error_code) {
531
			exit_int_info |= SVM_EVTINJ_VALID_ERR;
532
			vmcb12->control.exit_int_info_err =
533
				vcpu->arch.exception.error_code;
534
		}
535

536
	} else if (vcpu->arch.nmi_injected) {
537
		exit_int_info = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
538

539
	} else if (vcpu->arch.interrupt.injected) {
540
		nr = vcpu->arch.interrupt.nr;
541
		exit_int_info = nr | SVM_EVTINJ_VALID;
542

543
		if (vcpu->arch.interrupt.soft)
544
			exit_int_info |= SVM_EVTINJ_TYPE_SOFT;
545
		else
546
			exit_int_info |= SVM_EVTINJ_TYPE_INTR;
547
	}
548

549
	vmcb12->control.exit_int_info = exit_int_info;
550
}
551

552
static void nested_svm_transition_tlb_flush(struct kvm_vcpu *vcpu)
553
{
554
	/* Handle pending Hyper-V TLB flush requests */
555
	kvm_hv_nested_transtion_tlb_flush(vcpu, npt_enabled);
556

557
	/*
558
	 * TODO: optimize unconditional TLB flush/MMU sync.  A partial list of
559
	 * things to fix before this can be conditional:
560
	 *
561
	 *  - Flush TLBs for both L1 and L2 remote TLB flush
562
	 *  - Honor L1's request to flush an ASID on nested VMRUN
563
	 *  - Sync nested NPT MMU on VMRUN that flushes L2's ASID[*]
564
	 *  - Don't crush a pending TLB flush in vmcb02 on nested VMRUN
565
	 *  - Flush L1's ASID on KVM_REQ_TLB_FLUSH_GUEST
566
	 *
567
	 * [*] Unlike nested EPT, SVM's ASID management can invalidate nested
568
	 *     NPT guest-physical mappings on VMRUN.
569
	 */
570
	kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
571
	kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
572
}
573

574
/*
575
 * Load guest's/host's cr3 on nested vmentry or vmexit. @nested_npt is true
576
 * if we are emulating VM-Entry into a guest with NPT enabled.
577
 */
578
static int nested_svm_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3,
579
			       bool nested_npt, bool reload_pdptrs)
580
{
581
	if (CC(!kvm_vcpu_is_legal_cr3(vcpu, cr3)))
582
		return -EINVAL;
583

584
	if (reload_pdptrs && !nested_npt && is_pae_paging(vcpu) &&
585
	    CC(!load_pdptrs(vcpu, cr3)))
586
		return -EINVAL;
587

588
	vcpu->arch.cr3 = cr3;
589

590
	/* Re-initialize the MMU, e.g. to pick up CR4 MMU role changes. */
591
	kvm_init_mmu(vcpu);
592

593
	if (!nested_npt)
594
		kvm_mmu_new_pgd(vcpu, cr3);
595

596
	return 0;
597
}
598

599
void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm)
600
{
601
	if (!svm->nested.vmcb02.ptr)
602
		return;
603

604
	/* FIXME: merge g_pat from vmcb01 and vmcb12.  */
605
	svm->nested.vmcb02.ptr->save.g_pat = svm->vmcb01.ptr->save.g_pat;
606
}
607

608
static void nested_vmcb02_prepare_save(struct vcpu_svm *svm, struct vmcb *vmcb12)
609
{
610
	bool new_vmcb12 = false;
611
	struct vmcb *vmcb01 = svm->vmcb01.ptr;
612
	struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
613
	struct kvm_vcpu *vcpu = &svm->vcpu;
614

615
	nested_vmcb02_compute_g_pat(svm);
616

617
	/* Load the nested guest state */
618
	if (svm->nested.vmcb12_gpa != svm->nested.last_vmcb12_gpa) {
619
		new_vmcb12 = true;
620
		svm->nested.last_vmcb12_gpa = svm->nested.vmcb12_gpa;
621
		svm->nested.force_msr_bitmap_recalc = true;
622
	}
623

624
	if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_SEG))) {
625
		vmcb02->save.es = vmcb12->save.es;
626
		vmcb02->save.cs = vmcb12->save.cs;
627
		vmcb02->save.ss = vmcb12->save.ss;
628
		vmcb02->save.ds = vmcb12->save.ds;
629
		vmcb02->save.cpl = vmcb12->save.cpl;
630
		vmcb_mark_dirty(vmcb02, VMCB_SEG);
631
	}
632

633
	if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_DT))) {
634
		vmcb02->save.gdtr = vmcb12->save.gdtr;
635
		vmcb02->save.idtr = vmcb12->save.idtr;
636
		vmcb_mark_dirty(vmcb02, VMCB_DT);
637
	}
638

639
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_SHSTK) &&
640
	    (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_CET)))) {
641
		vmcb02->save.s_cet  = vmcb12->save.s_cet;
642
		vmcb02->save.isst_addr = vmcb12->save.isst_addr;
643
		vmcb02->save.ssp = vmcb12->save.ssp;
644
		vmcb_mark_dirty(vmcb02, VMCB_CET);
645
	}
646

647
	kvm_set_rflags(vcpu, vmcb12->save.rflags | X86_EFLAGS_FIXED);
648

649
	svm_set_efer(vcpu, svm->nested.save.efer);
650

651
	svm_set_cr0(vcpu, svm->nested.save.cr0);
652
	svm_set_cr4(vcpu, svm->nested.save.cr4);
653

654
	svm->vcpu.arch.cr2 = vmcb12->save.cr2;
655

656
	kvm_rax_write(vcpu, vmcb12->save.rax);
657
	kvm_rsp_write(vcpu, vmcb12->save.rsp);
658
	kvm_rip_write(vcpu, vmcb12->save.rip);
659

660
	/* In case we don't even reach vcpu_run, the fields are not updated */
661
	vmcb02->save.rax = vmcb12->save.rax;
662
	vmcb02->save.rsp = vmcb12->save.rsp;
663
	vmcb02->save.rip = vmcb12->save.rip;
664

665
	/* These bits will be set properly on the first execution when new_vmc12 is true */
666
	if (unlikely(new_vmcb12 || vmcb_is_dirty(vmcb12, VMCB_DR))) {
667
		vmcb02->save.dr7 = svm->nested.save.dr7 | DR7_FIXED_1;
668
		svm->vcpu.arch.dr6  = svm->nested.save.dr6 | DR6_ACTIVE_LOW;
669
		vmcb_mark_dirty(vmcb02, VMCB_DR);
670
	}
671

672
	if (unlikely(guest_cpu_cap_has(vcpu, X86_FEATURE_LBRV) &&
673
		     (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {
674
		/*
675
		 * Reserved bits of DEBUGCTL are ignored.  Be consistent with
676
		 * svm_set_msr's definition of reserved bits.
677
		 */
678
		svm_copy_lbrs(vmcb02, vmcb12);
679
		vmcb02->save.dbgctl &= ~DEBUGCTL_RESERVED_BITS;
680
		svm_update_lbrv(&svm->vcpu);
681

682
	} else if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) {
683
		svm_copy_lbrs(vmcb02, vmcb01);
684
	}
685
}
686

687
static inline bool is_evtinj_soft(u32 evtinj)
688
{
689
	u32 type = evtinj & SVM_EVTINJ_TYPE_MASK;
690
	u8 vector = evtinj & SVM_EVTINJ_VEC_MASK;
691

692
	if (!(evtinj & SVM_EVTINJ_VALID))
693
		return false;
694

695
	if (type == SVM_EVTINJ_TYPE_SOFT)
696
		return true;
697

698
	return type == SVM_EVTINJ_TYPE_EXEPT && kvm_exception_is_soft(vector);
699
}
700

701
static bool is_evtinj_nmi(u32 evtinj)
702
{
703
	u32 type = evtinj & SVM_EVTINJ_TYPE_MASK;
704

705
	if (!(evtinj & SVM_EVTINJ_VALID))
706
		return false;
707

708
	return type == SVM_EVTINJ_TYPE_NMI;
709
}
710

711
static void nested_vmcb02_prepare_control(struct vcpu_svm *svm,
712
					  unsigned long vmcb12_rip,
713
					  unsigned long vmcb12_csbase)
714
{
715
	u32 int_ctl_vmcb01_bits = V_INTR_MASKING_MASK;
716
	u32 int_ctl_vmcb12_bits = V_TPR_MASK | V_IRQ_INJECTION_BITS_MASK;
717

718
	struct kvm_vcpu *vcpu = &svm->vcpu;
719
	struct vmcb *vmcb01 = svm->vmcb01.ptr;
720
	struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
721
	u32 pause_count12;
722
	u32 pause_thresh12;
723

724
	nested_svm_transition_tlb_flush(vcpu);
725

726
	/* Enter Guest-Mode */
727
	enter_guest_mode(vcpu);
728

729
	/*
730
	 * Filled at exit: exit_code, exit_code_hi, exit_info_1, exit_info_2,
731
	 * exit_int_info, exit_int_info_err, next_rip, insn_len, insn_bytes.
732
	 */
733

734
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_VGIF) &&
735
	    (svm->nested.ctl.int_ctl & V_GIF_ENABLE_MASK))
736
		int_ctl_vmcb12_bits |= (V_GIF_MASK | V_GIF_ENABLE_MASK);
737
	else
738
		int_ctl_vmcb01_bits |= (V_GIF_MASK | V_GIF_ENABLE_MASK);
739

740
	if (vnmi) {
741
		if (vmcb01->control.int_ctl & V_NMI_PENDING_MASK) {
742
			svm->vcpu.arch.nmi_pending++;
743
			kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
744
		}
745
		if (nested_vnmi_enabled(svm))
746
			int_ctl_vmcb12_bits |= (V_NMI_PENDING_MASK |
747
						V_NMI_ENABLE_MASK |
748
						V_NMI_BLOCKING_MASK);
749
	}
750

751
	/* Copied from vmcb01.  msrpm_base can be overwritten later.  */
752
	vmcb02->control.nested_ctl = vmcb01->control.nested_ctl;
753
	vmcb02->control.iopm_base_pa = vmcb01->control.iopm_base_pa;
754
	vmcb02->control.msrpm_base_pa = vmcb01->control.msrpm_base_pa;
755

756
	/*
757
	 * Stash vmcb02's counter if the guest hasn't moved past the guilty
758
	 * instruction; otherwise, reset the counter to '0'.
759
	 *
760
	 * In order to detect if L2 has made forward progress or not, track the
761
	 * RIP at which a bus lock has occurred on a per-vmcb12 basis.  If RIP
762
	 * is changed, guest has clearly made forward progress, bus_lock_counter
763
	 * still remained '1', so reset bus_lock_counter to '0'. Eg. In the
764
	 * scenario, where a buslock happened in L1 before VMRUN, the bus lock
765
	 * firmly happened on an instruction in the past. Even if vmcb01's
766
	 * counter is still '1', (because the guilty instruction got patched),
767
	 * the vCPU has clearly made forward progress and so KVM should reset
768
	 * vmcb02's counter to '0'.
769
	 *
770
	 * If the RIP hasn't changed, stash the bus lock counter at nested VMRUN
771
	 * to prevent the same guilty instruction from triggering a VM-Exit. Eg.
772
	 * if userspace rate-limits the vCPU, then it's entirely possible that
773
	 * L1's tick interrupt is pending by the time userspace re-runs the
774
	 * vCPU.  If KVM unconditionally clears the counter on VMRUN, then when
775
	 * L1 re-enters L2, the same instruction will trigger a VM-Exit and the
776
	 * entire cycle start over.
777
	 */
778
	if (vmcb02->save.rip && (svm->nested.ctl.bus_lock_rip == vmcb02->save.rip))
779
		vmcb02->control.bus_lock_counter = 1;
780
	else
781
		vmcb02->control.bus_lock_counter = 0;
782

783
	/* Done at vmrun: asid.  */
784

785
	/* Also overwritten later if necessary.  */
786
	vmcb02->control.tlb_ctl = TLB_CONTROL_DO_NOTHING;
787

788
	/* nested_cr3.  */
789
	if (nested_npt_enabled(svm))
790
		nested_svm_init_mmu_context(vcpu);
791

792
	vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
793
			vcpu->arch.l1_tsc_offset,
794
			svm->nested.ctl.tsc_offset,
795
			svm->tsc_ratio_msr);
796

797
	vmcb02->control.tsc_offset = vcpu->arch.tsc_offset;
798

799
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_TSCRATEMSR) &&
800
	    svm->tsc_ratio_msr != kvm_caps.default_tsc_scaling_ratio)
801
		nested_svm_update_tsc_ratio_msr(vcpu);
802

803
	vmcb02->control.int_ctl             =
804
		(svm->nested.ctl.int_ctl & int_ctl_vmcb12_bits) |
805
		(vmcb01->control.int_ctl & int_ctl_vmcb01_bits);
806

807
	vmcb02->control.int_vector          = svm->nested.ctl.int_vector;
808
	vmcb02->control.int_state           = svm->nested.ctl.int_state;
809
	vmcb02->control.event_inj           = svm->nested.ctl.event_inj;
810
	vmcb02->control.event_inj_err       = svm->nested.ctl.event_inj_err;
811

812
	/*
813
	 * next_rip is consumed on VMRUN as the return address pushed on the
814
	 * stack for injected soft exceptions/interrupts.  If nrips is exposed
815
	 * to L1, take it verbatim from vmcb12.  If nrips is supported in
816
	 * hardware but not exposed to L1, stuff the actual L2 RIP to emulate
817
	 * what a nrips=0 CPU would do (L1 is responsible for advancing RIP
818
	 * prior to injecting the event).
819
	 */
820
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_NRIPS))
821
		vmcb02->control.next_rip    = svm->nested.ctl.next_rip;
822
	else if (boot_cpu_has(X86_FEATURE_NRIPS))
823
		vmcb02->control.next_rip    = vmcb12_rip;
824

825
	svm->nmi_l1_to_l2 = is_evtinj_nmi(vmcb02->control.event_inj);
826
	if (is_evtinj_soft(vmcb02->control.event_inj)) {
827
		svm->soft_int_injected = true;
828
		svm->soft_int_csbase = vmcb12_csbase;
829
		svm->soft_int_old_rip = vmcb12_rip;
830
		if (guest_cpu_cap_has(vcpu, X86_FEATURE_NRIPS))
831
			svm->soft_int_next_rip = svm->nested.ctl.next_rip;
832
		else
833
			svm->soft_int_next_rip = vmcb12_rip;
834
	}
835

836
	vmcb02->control.virt_ext            = vmcb01->control.virt_ext &
837
					      LBR_CTL_ENABLE_MASK;
838
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_LBRV))
839
		vmcb02->control.virt_ext  |=
840
			(svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK);
841

842
	if (!nested_vmcb_needs_vls_intercept(svm))
843
		vmcb02->control.virt_ext |= VIRTUAL_VMLOAD_VMSAVE_ENABLE_MASK;
844

845
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_PAUSEFILTER))
846
		pause_count12 = svm->nested.ctl.pause_filter_count;
847
	else
848
		pause_count12 = 0;
849
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_PFTHRESHOLD))
850
		pause_thresh12 = svm->nested.ctl.pause_filter_thresh;
851
	else
852
		pause_thresh12 = 0;
853
	if (kvm_pause_in_guest(svm->vcpu.kvm)) {
854
		/* use guest values since host doesn't intercept PAUSE */
855
		vmcb02->control.pause_filter_count = pause_count12;
856
		vmcb02->control.pause_filter_thresh = pause_thresh12;
857

858
	} else {
859
		/* start from host values otherwise */
860
		vmcb02->control.pause_filter_count = vmcb01->control.pause_filter_count;
861
		vmcb02->control.pause_filter_thresh = vmcb01->control.pause_filter_thresh;
862

863
		/* ... but ensure filtering is disabled if so requested.  */
864
		if (vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_PAUSE)) {
865
			if (!pause_count12)
866
				vmcb02->control.pause_filter_count = 0;
867
			if (!pause_thresh12)
868
				vmcb02->control.pause_filter_thresh = 0;
869
		}
870
	}
871

872
	/*
873
	 * Merge guest and host intercepts - must be called with vcpu in
874
	 * guest-mode to take effect.
875
	 */
876
	recalc_intercepts(svm);
877
}
878

879
static void nested_svm_copy_common_state(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
880
{
881
	/*
882
	 * Some VMCB state is shared between L1 and L2 and thus has to be
883
	 * moved at the time of nested vmrun and vmexit.
884
	 *
885
	 * VMLOAD/VMSAVE state would also belong in this category, but KVM
886
	 * always performs VMLOAD and VMSAVE from the VMCB01.
887
	 */
888
	to_vmcb->save.spec_ctrl = from_vmcb->save.spec_ctrl;
889
}
890

891
int enter_svm_guest_mode(struct kvm_vcpu *vcpu, u64 vmcb12_gpa,
892
			 struct vmcb *vmcb12, bool from_vmrun)
893
{
894
	struct vcpu_svm *svm = to_svm(vcpu);
895
	int ret;
896

897
	trace_kvm_nested_vmenter(svm->vmcb->save.rip,
898
				 vmcb12_gpa,
899
				 vmcb12->save.rip,
900
				 vmcb12->control.int_ctl,
901
				 vmcb12->control.event_inj,
902
				 vmcb12->control.nested_ctl,
903
				 vmcb12->control.nested_cr3,
904
				 vmcb12->save.cr3,
905
				 KVM_ISA_SVM);
906

907
	trace_kvm_nested_intercepts(vmcb12->control.intercepts[INTERCEPT_CR] & 0xffff,
908
				    vmcb12->control.intercepts[INTERCEPT_CR] >> 16,
909
				    vmcb12->control.intercepts[INTERCEPT_EXCEPTION],
910
				    vmcb12->control.intercepts[INTERCEPT_WORD3],
911
				    vmcb12->control.intercepts[INTERCEPT_WORD4],
912
				    vmcb12->control.intercepts[INTERCEPT_WORD5]);
913

914

915
	svm->nested.vmcb12_gpa = vmcb12_gpa;
916

917
	WARN_ON(svm->vmcb == svm->nested.vmcb02.ptr);
918

919
	nested_svm_copy_common_state(svm->vmcb01.ptr, svm->nested.vmcb02.ptr);
920

921
	svm_switch_vmcb(svm, &svm->nested.vmcb02);
922
	nested_vmcb02_prepare_control(svm, vmcb12->save.rip, vmcb12->save.cs.base);
923
	nested_vmcb02_prepare_save(svm, vmcb12);
924

925
	ret = nested_svm_load_cr3(&svm->vcpu, svm->nested.save.cr3,
926
				  nested_npt_enabled(svm), from_vmrun);
927
	if (ret)
928
		return ret;
929

930
	if (!from_vmrun)
931
		kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
932

933
	svm_set_gif(svm, true);
934

935
	if (kvm_vcpu_apicv_active(vcpu))
936
		kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
937

938
	nested_svm_hv_update_vm_vp_ids(vcpu);
939

940
	return 0;
941
}
942

943
int nested_svm_vmrun(struct kvm_vcpu *vcpu)
944
{
945
	struct vcpu_svm *svm = to_svm(vcpu);
946
	int ret;
947
	struct vmcb *vmcb12;
948
	struct kvm_host_map map;
949
	u64 vmcb12_gpa;
950
	struct vmcb *vmcb01 = svm->vmcb01.ptr;
951

952
	if (!svm->nested.hsave_msr) {
953
		kvm_inject_gp(vcpu, 0);
954
		return 1;
955
	}
956

957
	if (is_smm(vcpu)) {
958
		kvm_queue_exception(vcpu, UD_VECTOR);
959
		return 1;
960
	}
961

962
	/* This fails when VP assist page is enabled but the supplied GPA is bogus */
963
	ret = kvm_hv_verify_vp_assist(vcpu);
964
	if (ret) {
965
		kvm_inject_gp(vcpu, 0);
966
		return ret;
967
	}
968

969
	vmcb12_gpa = svm->vmcb->save.rax;
970
	ret = kvm_vcpu_map(vcpu, gpa_to_gfn(vmcb12_gpa), &map);
971
	if (ret == -EINVAL) {
972
		kvm_inject_gp(vcpu, 0);
973
		return 1;
974
	} else if (ret) {
975
		return kvm_skip_emulated_instruction(vcpu);
976
	}
977

978
	ret = kvm_skip_emulated_instruction(vcpu);
979

980
	vmcb12 = map.hva;
981

982
	if (WARN_ON_ONCE(!svm->nested.initialized))
983
		return -EINVAL;
984

985
	nested_copy_vmcb_control_to_cache(svm, &vmcb12->control);
986
	nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);
987

988
	if (!nested_vmcb_check_save(vcpu) ||
989
	    !nested_vmcb_check_controls(vcpu)) {
990
		vmcb12->control.exit_code    = SVM_EXIT_ERR;
991
		vmcb12->control.exit_code_hi = 0;
992
		vmcb12->control.exit_info_1  = 0;
993
		vmcb12->control.exit_info_2  = 0;
994
		goto out;
995
	}
996

997
	/*
998
	 * Since vmcb01 is not in use, we can use it to store some of the L1
999
	 * state.
1000
	 */
1001
	vmcb01->save.efer   = vcpu->arch.efer;
1002
	vmcb01->save.cr0    = kvm_read_cr0(vcpu);
1003
	vmcb01->save.cr4    = vcpu->arch.cr4;
1004
	vmcb01->save.rflags = kvm_get_rflags(vcpu);
1005
	vmcb01->save.rip    = kvm_rip_read(vcpu);
1006

1007
	if (!npt_enabled)
1008
		vmcb01->save.cr3 = kvm_read_cr3(vcpu);
1009

1010
	svm->nested.nested_run_pending = 1;
1011

1012
	if (enter_svm_guest_mode(vcpu, vmcb12_gpa, vmcb12, true))
1013
		goto out_exit_err;
1014

1015
	if (nested_svm_merge_msrpm(vcpu))
1016
		goto out;
1017

1018
out_exit_err:
1019
	svm->nested.nested_run_pending = 0;
1020
	svm->nmi_l1_to_l2 = false;
1021
	svm->soft_int_injected = false;
1022

1023
	svm->vmcb->control.exit_code    = SVM_EXIT_ERR;
1024
	svm->vmcb->control.exit_code_hi = 0;
1025
	svm->vmcb->control.exit_info_1  = 0;
1026
	svm->vmcb->control.exit_info_2  = 0;
1027

1028
	nested_svm_vmexit(svm);
1029

1030
out:
1031
	kvm_vcpu_unmap(vcpu, &map);
1032

1033
	return ret;
1034
}
1035

1036
/* Copy state save area fields which are handled by VMRUN */
1037
void svm_copy_vmrun_state(struct vmcb_save_area *to_save,
1038
			  struct vmcb_save_area *from_save)
1039
{
1040
	to_save->es = from_save->es;
1041
	to_save->cs = from_save->cs;
1042
	to_save->ss = from_save->ss;
1043
	to_save->ds = from_save->ds;
1044
	to_save->gdtr = from_save->gdtr;
1045
	to_save->idtr = from_save->idtr;
1046
	to_save->rflags = from_save->rflags | X86_EFLAGS_FIXED;
1047
	to_save->efer = from_save->efer;
1048
	to_save->cr0 = from_save->cr0;
1049
	to_save->cr3 = from_save->cr3;
1050
	to_save->cr4 = from_save->cr4;
1051
	to_save->rax = from_save->rax;
1052
	to_save->rsp = from_save->rsp;
1053
	to_save->rip = from_save->rip;
1054
	to_save->cpl = 0;
1055

1056
	if (kvm_cpu_cap_has(X86_FEATURE_SHSTK)) {
1057
		to_save->s_cet  = from_save->s_cet;
1058
		to_save->isst_addr = from_save->isst_addr;
1059
		to_save->ssp = from_save->ssp;
1060
	}
1061
}
1062

1063
void svm_copy_vmloadsave_state(struct vmcb *to_vmcb, struct vmcb *from_vmcb)
1064
{
1065
	to_vmcb->save.fs = from_vmcb->save.fs;
1066
	to_vmcb->save.gs = from_vmcb->save.gs;
1067
	to_vmcb->save.tr = from_vmcb->save.tr;
1068
	to_vmcb->save.ldtr = from_vmcb->save.ldtr;
1069
	to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
1070
	to_vmcb->save.star = from_vmcb->save.star;
1071
	to_vmcb->save.lstar = from_vmcb->save.lstar;
1072
	to_vmcb->save.cstar = from_vmcb->save.cstar;
1073
	to_vmcb->save.sfmask = from_vmcb->save.sfmask;
1074
	to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
1075
	to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
1076
	to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
1077
}
1078

1079
int nested_svm_vmexit(struct vcpu_svm *svm)
1080
{
1081
	struct kvm_vcpu *vcpu = &svm->vcpu;
1082
	struct vmcb *vmcb01 = svm->vmcb01.ptr;
1083
	struct vmcb *vmcb02 = svm->nested.vmcb02.ptr;
1084
	struct vmcb *vmcb12;
1085
	struct kvm_host_map map;
1086
	int rc;
1087

1088
	rc = kvm_vcpu_map(vcpu, gpa_to_gfn(svm->nested.vmcb12_gpa), &map);
1089
	if (rc) {
1090
		if (rc == -EINVAL)
1091
			kvm_inject_gp(vcpu, 0);
1092
		return 1;
1093
	}
1094

1095
	vmcb12 = map.hva;
1096

1097
	/* Exit Guest-Mode */
1098
	leave_guest_mode(vcpu);
1099
	svm->nested.vmcb12_gpa = 0;
1100
	WARN_ON_ONCE(svm->nested.nested_run_pending);
1101

1102
	kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
1103

1104
	/* in case we halted in L2 */
1105
	kvm_set_mp_state(vcpu, KVM_MP_STATE_RUNNABLE);
1106

1107
	/* Give the current vmcb to the guest */
1108

1109
	vmcb12->save.es     = vmcb02->save.es;
1110
	vmcb12->save.cs     = vmcb02->save.cs;
1111
	vmcb12->save.ss     = vmcb02->save.ss;
1112
	vmcb12->save.ds     = vmcb02->save.ds;
1113
	vmcb12->save.gdtr   = vmcb02->save.gdtr;
1114
	vmcb12->save.idtr   = vmcb02->save.idtr;
1115
	vmcb12->save.efer   = svm->vcpu.arch.efer;
1116
	vmcb12->save.cr0    = kvm_read_cr0(vcpu);
1117
	vmcb12->save.cr3    = kvm_read_cr3(vcpu);
1118
	vmcb12->save.cr2    = vmcb02->save.cr2;
1119
	vmcb12->save.cr4    = svm->vcpu.arch.cr4;
1120
	vmcb12->save.rflags = kvm_get_rflags(vcpu);
1121
	vmcb12->save.rip    = kvm_rip_read(vcpu);
1122
	vmcb12->save.rsp    = kvm_rsp_read(vcpu);
1123
	vmcb12->save.rax    = kvm_rax_read(vcpu);
1124
	vmcb12->save.dr7    = vmcb02->save.dr7;
1125
	vmcb12->save.dr6    = svm->vcpu.arch.dr6;
1126
	vmcb12->save.cpl    = vmcb02->save.cpl;
1127

1128
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_SHSTK)) {
1129
		vmcb12->save.s_cet	= vmcb02->save.s_cet;
1130
		vmcb12->save.isst_addr	= vmcb02->save.isst_addr;
1131
		vmcb12->save.ssp	= vmcb02->save.ssp;
1132
	}
1133

1134
	vmcb12->control.int_state         = vmcb02->control.int_state;
1135
	vmcb12->control.exit_code         = vmcb02->control.exit_code;
1136
	vmcb12->control.exit_code_hi      = vmcb02->control.exit_code_hi;
1137
	vmcb12->control.exit_info_1       = vmcb02->control.exit_info_1;
1138
	vmcb12->control.exit_info_2       = vmcb02->control.exit_info_2;
1139

1140
	if (vmcb12->control.exit_code != SVM_EXIT_ERR)
1141
		nested_save_pending_event_to_vmcb12(svm, vmcb12);
1142

1143
	if (guest_cpu_cap_has(vcpu, X86_FEATURE_NRIPS))
1144
		vmcb12->control.next_rip  = vmcb02->control.next_rip;
1145

1146
	vmcb12->control.int_ctl           = svm->nested.ctl.int_ctl;
1147
	vmcb12->control.event_inj         = svm->nested.ctl.event_inj;
1148
	vmcb12->control.event_inj_err     = svm->nested.ctl.event_inj_err;
1149

1150
	if (!kvm_pause_in_guest(vcpu->kvm)) {
1151
		vmcb01->control.pause_filter_count = vmcb02->control.pause_filter_count;
1152
		vmcb_mark_dirty(vmcb01, VMCB_INTERCEPTS);
1153

1154
	}
1155

1156
	/*
1157
	 * Invalidate bus_lock_rip unless KVM is still waiting for the guest
1158
	 * to make forward progress before re-enabling bus lock detection.
1159
	 */
1160
	if (!vmcb02->control.bus_lock_counter)
1161
		svm->nested.ctl.bus_lock_rip = INVALID_GPA;
1162

1163
	nested_svm_copy_common_state(svm->nested.vmcb02.ptr, svm->vmcb01.ptr);
1164

1165
	kvm_nested_vmexit_handle_ibrs(vcpu);
1166

1167
	svm_switch_vmcb(svm, &svm->vmcb01);
1168

1169
	/*
1170
	 * Rules for synchronizing int_ctl bits from vmcb02 to vmcb01:
1171
	 *
1172
	 * V_IRQ, V_IRQ_VECTOR, V_INTR_PRIO_MASK, V_IGN_TPR:  If L1 doesn't
1173
	 * intercept interrupts, then KVM will use vmcb02's V_IRQ (and related
1174
	 * flags) to detect interrupt windows for L1 IRQs (even if L1 uses
1175
	 * virtual interrupt masking).  Raise KVM_REQ_EVENT to ensure that
1176
	 * KVM re-requests an interrupt window if necessary, which implicitly
1177
	 * copies this bits from vmcb02 to vmcb01.
1178
	 *
1179
	 * V_TPR: If L1 doesn't use virtual interrupt masking, then L1's vTPR
1180
	 * is stored in vmcb02, but its value doesn't need to be copied from/to
1181
	 * vmcb01 because it is copied from/to the virtual APIC's TPR register
1182
	 * on each VM entry/exit.
1183
	 *
1184
	 * V_GIF: If nested vGIF is not used, KVM uses vmcb02's V_GIF for L1's
1185
	 * V_GIF.  However, GIF is architecturally clear on each VM exit, thus
1186
	 * there is no need to copy V_GIF from vmcb02 to vmcb01.
1187
	 */
1188
	if (!nested_exit_on_intr(svm))
1189
		kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
1190

1191
	if (unlikely(guest_cpu_cap_has(vcpu, X86_FEATURE_LBRV) &&
1192
		     (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {
1193
		svm_copy_lbrs(vmcb12, vmcb02);
1194
		svm_update_lbrv(vcpu);
1195
	} else if (unlikely(vmcb01->control.virt_ext & LBR_CTL_ENABLE_MASK)) {
1196
		svm_copy_lbrs(vmcb01, vmcb02);
1197
		svm_update_lbrv(vcpu);
1198
	}
1199

1200
	if (vnmi) {
1201
		if (vmcb02->control.int_ctl & V_NMI_BLOCKING_MASK)
1202
			vmcb01->control.int_ctl |= V_NMI_BLOCKING_MASK;
1203
		else
1204
			vmcb01->control.int_ctl &= ~V_NMI_BLOCKING_MASK;
1205

1206
		if (vcpu->arch.nmi_pending) {
1207
			vcpu->arch.nmi_pending--;
1208
			vmcb01->control.int_ctl |= V_NMI_PENDING_MASK;
1209
		} else {
1210
			vmcb01->control.int_ctl &= ~V_NMI_PENDING_MASK;
1211
		}
1212
	}
1213

1214
	/*
1215
	 * On vmexit the  GIF is set to false and
1216
	 * no event can be injected in L1.
1217
	 */
1218
	svm_set_gif(svm, false);
1219
	vmcb01->control.exit_int_info = 0;
1220

1221
	svm->vcpu.arch.tsc_offset = svm->vcpu.arch.l1_tsc_offset;
1222
	if (vmcb01->control.tsc_offset != svm->vcpu.arch.tsc_offset) {
1223
		vmcb01->control.tsc_offset = svm->vcpu.arch.tsc_offset;
1224
		vmcb_mark_dirty(vmcb01, VMCB_INTERCEPTS);
1225
	}
1226

1227
	if (kvm_caps.has_tsc_control &&
1228
	    vcpu->arch.tsc_scaling_ratio != vcpu->arch.l1_tsc_scaling_ratio) {
1229
		vcpu->arch.tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio;
1230
		svm_write_tsc_multiplier(vcpu);
1231
	}
1232

1233
	svm->nested.ctl.nested_cr3 = 0;
1234

1235
	/*
1236
	 * Restore processor state that had been saved in vmcb01
1237
	 */
1238
	kvm_set_rflags(vcpu, vmcb01->save.rflags);
1239
	svm_set_efer(vcpu, vmcb01->save.efer);
1240
	svm_set_cr0(vcpu, vmcb01->save.cr0 | X86_CR0_PE);
1241
	svm_set_cr4(vcpu, vmcb01->save.cr4);
1242
	kvm_rax_write(vcpu, vmcb01->save.rax);
1243
	kvm_rsp_write(vcpu, vmcb01->save.rsp);
1244
	kvm_rip_write(vcpu, vmcb01->save.rip);
1245

1246
	svm->vcpu.arch.dr7 = DR7_FIXED_1;
1247
	kvm_update_dr7(&svm->vcpu);
1248

1249
	trace_kvm_nested_vmexit_inject(vmcb12->control.exit_code,
1250
				       vmcb12->control.exit_info_1,
1251
				       vmcb12->control.exit_info_2,
1252
				       vmcb12->control.exit_int_info,
1253
				       vmcb12->control.exit_int_info_err,
1254
				       KVM_ISA_SVM);
1255

1256
	kvm_vcpu_unmap(vcpu, &map);
1257

1258
	nested_svm_transition_tlb_flush(vcpu);
1259

1260
	nested_svm_uninit_mmu_context(vcpu);
1261

1262
	rc = nested_svm_load_cr3(vcpu, vmcb01->save.cr3, false, true);
1263
	if (rc)
1264
		return 1;
1265

1266
	/*
1267
	 * Drop what we picked up for L2 via svm_complete_interrupts() so it
1268
	 * doesn't end up in L1.
1269
	 */
1270
	svm->vcpu.arch.nmi_injected = false;
1271
	kvm_clear_exception_queue(vcpu);
1272
	kvm_clear_interrupt_queue(vcpu);
1273

1274
	/*
1275
	 * If we are here following the completion of a VMRUN that
1276
	 * is being single-stepped, queue the pending #DB intercept
1277
	 * right now so that it an be accounted for before we execute
1278
	 * L1's next instruction.
1279
	 */
1280
	if (unlikely(vmcb01->save.rflags & X86_EFLAGS_TF))
1281
		kvm_queue_exception(&(svm->vcpu), DB_VECTOR);
1282

1283
	/*
1284
	 * Un-inhibit the AVIC right away, so that other vCPUs can start
1285
	 * to benefit from it right away.
1286
	 */
1287
	if (kvm_apicv_activated(vcpu->kvm))
1288
		__kvm_vcpu_update_apicv(vcpu);
1289

1290
	return 0;
1291
}
1292

1293
static void nested_svm_triple_fault(struct kvm_vcpu *vcpu)
1294
{
1295
	struct vcpu_svm *svm = to_svm(vcpu);
1296

1297
	if (!vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_SHUTDOWN))
1298
		return;
1299

1300
	kvm_clear_request(KVM_REQ_TRIPLE_FAULT, vcpu);
1301
	nested_svm_simple_vmexit(to_svm(vcpu), SVM_EXIT_SHUTDOWN);
1302
}
1303

1304
int svm_allocate_nested(struct vcpu_svm *svm)
1305
{
1306
	struct page *vmcb02_page;
1307

1308
	if (svm->nested.initialized)
1309
		return 0;
1310

1311
	vmcb02_page = snp_safe_alloc_page();
1312
	if (!vmcb02_page)
1313
		return -ENOMEM;
1314
	svm->nested.vmcb02.ptr = page_address(vmcb02_page);
1315
	svm->nested.vmcb02.pa = __sme_set(page_to_pfn(vmcb02_page) << PAGE_SHIFT);
1316

1317
	svm->nested.msrpm = svm_vcpu_alloc_msrpm();
1318
	if (!svm->nested.msrpm)
1319
		goto err_free_vmcb02;
1320

1321
	svm->nested.initialized = true;
1322
	return 0;
1323

1324
err_free_vmcb02:
1325
	__free_page(vmcb02_page);
1326
	return -ENOMEM;
1327
}
1328

1329
void svm_free_nested(struct vcpu_svm *svm)
1330
{
1331
	if (!svm->nested.initialized)
1332
		return;
1333

1334
	if (WARN_ON_ONCE(svm->vmcb != svm->vmcb01.ptr))
1335
		svm_switch_vmcb(svm, &svm->vmcb01);
1336

1337
	svm_vcpu_free_msrpm(svm->nested.msrpm);
1338
	svm->nested.msrpm = NULL;
1339

1340
	__free_page(virt_to_page(svm->nested.vmcb02.ptr));
1341
	svm->nested.vmcb02.ptr = NULL;
1342

1343
	/*
1344
	 * When last_vmcb12_gpa matches the current vmcb12 gpa,
1345
	 * some vmcb12 fields are not loaded if they are marked clean
1346
	 * in the vmcb12, since in this case they are up to date already.
1347
	 *
1348
	 * When the vmcb02 is freed, this optimization becomes invalid.
1349
	 */
1350
	svm->nested.last_vmcb12_gpa = INVALID_GPA;
1351

1352
	svm->nested.initialized = false;
1353
}
1354

1355
void svm_leave_nested(struct kvm_vcpu *vcpu)
1356
{
1357
	struct vcpu_svm *svm = to_svm(vcpu);
1358

1359
	if (is_guest_mode(vcpu)) {
1360
		svm->nested.nested_run_pending = 0;
1361
		svm->nested.vmcb12_gpa = INVALID_GPA;
1362

1363
		leave_guest_mode(vcpu);
1364

1365
		svm_switch_vmcb(svm, &svm->vmcb01);
1366

1367
		nested_svm_uninit_mmu_context(vcpu);
1368
		vmcb_mark_all_dirty(svm->vmcb);
1369

1370
		if (kvm_apicv_activated(vcpu->kvm))
1371
			kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
1372
	}
1373

1374
	kvm_clear_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
1375
}
1376

1377
static int nested_svm_exit_handled_msr(struct vcpu_svm *svm)
1378
{
1379
	gpa_t base = svm->nested.ctl.msrpm_base_pa;
1380
	int write, bit_nr;
1381
	u8 value, mask;
1382
	u32 msr;
1383

1384
	if (!(vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_MSR_PROT)))
1385
		return NESTED_EXIT_HOST;
1386

1387
	msr    = svm->vcpu.arch.regs[VCPU_REGS_RCX];
1388
	bit_nr = svm_msrpm_bit_nr(msr);
1389
	write  = svm->vmcb->control.exit_info_1 & 1;
1390

1391
	if (bit_nr < 0)
1392
		return NESTED_EXIT_DONE;
1393

1394
	if (kvm_vcpu_read_guest(&svm->vcpu, base + bit_nr / BITS_PER_BYTE,
1395
				&value, sizeof(value)))
1396
		return NESTED_EXIT_DONE;
1397

1398
	mask = BIT(write) << (bit_nr & (BITS_PER_BYTE - 1));
1399
	return (value & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
1400
}
1401

1402
static int nested_svm_intercept_ioio(struct vcpu_svm *svm)
1403
{
1404
	unsigned port, size, iopm_len;
1405
	u16 val, mask;
1406
	u8 start_bit;
1407
	u64 gpa;
1408

1409
	if (!(vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_IOIO_PROT)))
1410
		return NESTED_EXIT_HOST;
1411

1412
	port = svm->vmcb->control.exit_info_1 >> 16;
1413
	size = (svm->vmcb->control.exit_info_1 & SVM_IOIO_SIZE_MASK) >>
1414
		SVM_IOIO_SIZE_SHIFT;
1415
	gpa  = svm->nested.ctl.iopm_base_pa + (port / 8);
1416
	start_bit = port % 8;
1417
	iopm_len = (start_bit + size > 8) ? 2 : 1;
1418
	mask = (0xf >> (4 - size)) << start_bit;
1419
	val = 0;
1420

1421
	if (kvm_vcpu_read_guest(&svm->vcpu, gpa, &val, iopm_len))
1422
		return NESTED_EXIT_DONE;
1423

1424
	return (val & mask) ? NESTED_EXIT_DONE : NESTED_EXIT_HOST;
1425
}
1426

1427
static int nested_svm_intercept(struct vcpu_svm *svm)
1428
{
1429
	u32 exit_code = svm->vmcb->control.exit_code;
1430
	int vmexit = NESTED_EXIT_HOST;
1431

1432
	switch (exit_code) {
1433
	case SVM_EXIT_MSR:
1434
		vmexit = nested_svm_exit_handled_msr(svm);
1435
		break;
1436
	case SVM_EXIT_IOIO:
1437
		vmexit = nested_svm_intercept_ioio(svm);
1438
		break;
1439
	case SVM_EXIT_READ_CR0 ... SVM_EXIT_WRITE_CR8: {
1440
		if (vmcb12_is_intercept(&svm->nested.ctl, exit_code))
1441
			vmexit = NESTED_EXIT_DONE;
1442
		break;
1443
	}
1444
	case SVM_EXIT_READ_DR0 ... SVM_EXIT_WRITE_DR7: {
1445
		if (vmcb12_is_intercept(&svm->nested.ctl, exit_code))
1446
			vmexit = NESTED_EXIT_DONE;
1447
		break;
1448
	}
1449
	case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
1450
		/*
1451
		 * Host-intercepted exceptions have been checked already in
1452
		 * nested_svm_exit_special.  There is nothing to do here,
1453
		 * the vmexit is injected by svm_check_nested_events.
1454
		 */
1455
		vmexit = NESTED_EXIT_DONE;
1456
		break;
1457
	}
1458
	case SVM_EXIT_ERR: {
1459
		vmexit = NESTED_EXIT_DONE;
1460
		break;
1461
	}
1462
	default: {
1463
		if (vmcb12_is_intercept(&svm->nested.ctl, exit_code))
1464
			vmexit = NESTED_EXIT_DONE;
1465
	}
1466
	}
1467

1468
	return vmexit;
1469
}
1470

1471
int nested_svm_exit_handled(struct vcpu_svm *svm)
1472
{
1473
	int vmexit;
1474

1475
	vmexit = nested_svm_intercept(svm);
1476

1477
	if (vmexit == NESTED_EXIT_DONE)
1478
		nested_svm_vmexit(svm);
1479

1480
	return vmexit;
1481
}
1482

1483
int nested_svm_check_permissions(struct kvm_vcpu *vcpu)
1484
{
1485
	if (!(vcpu->arch.efer & EFER_SVME) || !is_paging(vcpu)) {
1486
		kvm_queue_exception(vcpu, UD_VECTOR);
1487
		return 1;
1488
	}
1489

1490
	if (to_svm(vcpu)->vmcb->save.cpl) {
1491
		kvm_inject_gp(vcpu, 0);
1492
		return 1;
1493
	}
1494

1495
	return 0;
1496
}
1497

1498
static bool nested_svm_is_exception_vmexit(struct kvm_vcpu *vcpu, u8 vector,
1499
					   u32 error_code)
1500
{
1501
	struct vcpu_svm *svm = to_svm(vcpu);
1502

1503
	return (svm->nested.ctl.intercepts[INTERCEPT_EXCEPTION] & BIT(vector));
1504
}
1505

1506
static void nested_svm_inject_exception_vmexit(struct kvm_vcpu *vcpu)
1507
{
1508
	struct kvm_queued_exception *ex = &vcpu->arch.exception_vmexit;
1509
	struct vcpu_svm *svm = to_svm(vcpu);
1510
	struct vmcb *vmcb = svm->vmcb;
1511

1512
	vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + ex->vector;
1513
	vmcb->control.exit_code_hi = 0;
1514

1515
	if (ex->has_error_code)
1516
		vmcb->control.exit_info_1 = ex->error_code;
1517

1518
	/*
1519
	 * EXITINFO2 is undefined for all exception intercepts other
1520
	 * than #PF.
1521
	 */
1522
	if (ex->vector == PF_VECTOR) {
1523
		if (ex->has_payload)
1524
			vmcb->control.exit_info_2 = ex->payload;
1525
		else
1526
			vmcb->control.exit_info_2 = vcpu->arch.cr2;
1527
	} else if (ex->vector == DB_VECTOR) {
1528
		/* See kvm_check_and_inject_events().  */
1529
		kvm_deliver_exception_payload(vcpu, ex);
1530

1531
		if (vcpu->arch.dr7 & DR7_GD) {
1532
			vcpu->arch.dr7 &= ~DR7_GD;
1533
			kvm_update_dr7(vcpu);
1534
		}
1535
	} else {
1536
		WARN_ON(ex->has_payload);
1537
	}
1538

1539
	nested_svm_vmexit(svm);
1540
}
1541

1542
static inline bool nested_exit_on_init(struct vcpu_svm *svm)
1543
{
1544
	return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_INIT);
1545
}
1546

1547
static int svm_check_nested_events(struct kvm_vcpu *vcpu)
1548
{
1549
	struct kvm_lapic *apic = vcpu->arch.apic;
1550
	struct vcpu_svm *svm = to_svm(vcpu);
1551
	/*
1552
	 * Only a pending nested run blocks a pending exception.  If there is a
1553
	 * previously injected event, the pending exception occurred while said
1554
	 * event was being delivered and thus needs to be handled.
1555
	 */
1556
	bool block_nested_exceptions = svm->nested.nested_run_pending;
1557
	/*
1558
	 * New events (not exceptions) are only recognized at instruction
1559
	 * boundaries.  If an event needs reinjection, then KVM is handling a
1560
	 * VM-Exit that occurred _during_ instruction execution; new events are
1561
	 * blocked until the instruction completes.
1562
	 */
1563
	bool block_nested_events = block_nested_exceptions ||
1564
				   kvm_event_needs_reinjection(vcpu);
1565

1566
	if (lapic_in_kernel(vcpu) &&
1567
	    test_bit(KVM_APIC_INIT, &apic->pending_events)) {
1568
		if (block_nested_events)
1569
			return -EBUSY;
1570
		if (!nested_exit_on_init(svm))
1571
			return 0;
1572
		nested_svm_simple_vmexit(svm, SVM_EXIT_INIT);
1573
		return 0;
1574
	}
1575

1576
	if (vcpu->arch.exception_vmexit.pending) {
1577
		if (block_nested_exceptions)
1578
                        return -EBUSY;
1579
		nested_svm_inject_exception_vmexit(vcpu);
1580
		return 0;
1581
	}
1582

1583
	if (vcpu->arch.exception.pending) {
1584
		if (block_nested_exceptions)
1585
			return -EBUSY;
1586
		return 0;
1587
	}
1588

1589
#ifdef CONFIG_KVM_SMM
1590
	if (vcpu->arch.smi_pending && !svm_smi_blocked(vcpu)) {
1591
		if (block_nested_events)
1592
			return -EBUSY;
1593
		if (!nested_exit_on_smi(svm))
1594
			return 0;
1595
		nested_svm_simple_vmexit(svm, SVM_EXIT_SMI);
1596
		return 0;
1597
	}
1598
#endif
1599

1600
	if (vcpu->arch.nmi_pending && !svm_nmi_blocked(vcpu)) {
1601
		if (block_nested_events)
1602
			return -EBUSY;
1603
		if (!nested_exit_on_nmi(svm))
1604
			return 0;
1605
		nested_svm_simple_vmexit(svm, SVM_EXIT_NMI);
1606
		return 0;
1607
	}
1608

1609
	if (kvm_cpu_has_interrupt(vcpu) && !svm_interrupt_blocked(vcpu)) {
1610
		if (block_nested_events)
1611
			return -EBUSY;
1612
		if (!nested_exit_on_intr(svm))
1613
			return 0;
1614
		trace_kvm_nested_intr_vmexit(svm->vmcb->save.rip);
1615
		nested_svm_simple_vmexit(svm, SVM_EXIT_INTR);
1616
		return 0;
1617
	}
1618

1619
	return 0;
1620
}
1621

1622
int nested_svm_exit_special(struct vcpu_svm *svm)
1623
{
1624
	u32 exit_code = svm->vmcb->control.exit_code;
1625
	struct kvm_vcpu *vcpu = &svm->vcpu;
1626

1627
	switch (exit_code) {
1628
	case SVM_EXIT_INTR:
1629
	case SVM_EXIT_NMI:
1630
	case SVM_EXIT_NPF:
1631
		return NESTED_EXIT_HOST;
1632
	case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
1633
		u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
1634

1635
		if (svm->vmcb01.ptr->control.intercepts[INTERCEPT_EXCEPTION] &
1636
		    excp_bits)
1637
			return NESTED_EXIT_HOST;
1638
		else if (exit_code == SVM_EXIT_EXCP_BASE + PF_VECTOR &&
1639
			 svm->vcpu.arch.apf.host_apf_flags)
1640
			/* Trap async PF even if not shadowing */
1641
			return NESTED_EXIT_HOST;
1642
		break;
1643
	}
1644
	case SVM_EXIT_VMMCALL:
1645
		/* Hyper-V L2 TLB flush hypercall is handled by L0 */
1646
		if (guest_hv_cpuid_has_l2_tlb_flush(vcpu) &&
1647
		    nested_svm_l2_tlb_flush_enabled(vcpu) &&
1648
		    kvm_hv_is_tlb_flush_hcall(vcpu))
1649
			return NESTED_EXIT_HOST;
1650
		break;
1651
	default:
1652
		break;
1653
	}
1654

1655
	return NESTED_EXIT_CONTINUE;
1656
}
1657

1658
void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu *vcpu)
1659
{
1660
	struct vcpu_svm *svm = to_svm(vcpu);
1661

1662
	vcpu->arch.tsc_scaling_ratio =
1663
		kvm_calc_nested_tsc_multiplier(vcpu->arch.l1_tsc_scaling_ratio,
1664
					       svm->tsc_ratio_msr);
1665
	svm_write_tsc_multiplier(vcpu);
1666
}
1667

1668
/* Inverse operation of nested_copy_vmcb_control_to_cache(). asid is copied too. */
1669
static void nested_copy_vmcb_cache_to_control(struct vmcb_control_area *dst,
1670
					      struct vmcb_ctrl_area_cached *from)
1671
{
1672
	unsigned int i;
1673

1674
	memset(dst, 0, sizeof(struct vmcb_control_area));
1675

1676
	for (i = 0; i < MAX_INTERCEPT; i++)
1677
		dst->intercepts[i] = from->intercepts[i];
1678

1679
	dst->iopm_base_pa         = from->iopm_base_pa;
1680
	dst->msrpm_base_pa        = from->msrpm_base_pa;
1681
	dst->tsc_offset           = from->tsc_offset;
1682
	dst->asid                 = from->asid;
1683
	dst->tlb_ctl              = from->tlb_ctl;
1684
	dst->int_ctl              = from->int_ctl;
1685
	dst->int_vector           = from->int_vector;
1686
	dst->int_state            = from->int_state;
1687
	dst->exit_code            = from->exit_code;
1688
	dst->exit_code_hi         = from->exit_code_hi;
1689
	dst->exit_info_1          = from->exit_info_1;
1690
	dst->exit_info_2          = from->exit_info_2;
1691
	dst->exit_int_info        = from->exit_int_info;
1692
	dst->exit_int_info_err    = from->exit_int_info_err;
1693
	dst->nested_ctl           = from->nested_ctl;
1694
	dst->event_inj            = from->event_inj;
1695
	dst->event_inj_err        = from->event_inj_err;
1696
	dst->next_rip             = from->next_rip;
1697
	dst->nested_cr3           = from->nested_cr3;
1698
	dst->virt_ext              = from->virt_ext;
1699
	dst->pause_filter_count   = from->pause_filter_count;
1700
	dst->pause_filter_thresh  = from->pause_filter_thresh;
1701
	/* 'clean' and 'hv_enlightenments' are not changed by KVM */
1702
}
1703

1704
static int svm_get_nested_state(struct kvm_vcpu *vcpu,
1705
				struct kvm_nested_state __user *user_kvm_nested_state,
1706
				u32 user_data_size)
1707
{
1708
	struct vcpu_svm *svm;
1709
	struct vmcb_control_area *ctl;
1710
	unsigned long r;
1711
	struct kvm_nested_state kvm_state = {
1712
		.flags = 0,
1713
		.format = KVM_STATE_NESTED_FORMAT_SVM,
1714
		.size = sizeof(kvm_state),
1715
	};
1716
	struct vmcb __user *user_vmcb = (struct vmcb __user *)
1717
		&user_kvm_nested_state->data.svm[0];
1718

1719
	if (!vcpu)
1720
		return kvm_state.size + KVM_STATE_NESTED_SVM_VMCB_SIZE;
1721

1722
	svm = to_svm(vcpu);
1723

1724
	if (user_data_size < kvm_state.size)
1725
		goto out;
1726

1727
	/* First fill in the header and copy it out.  */
1728
	if (is_guest_mode(vcpu)) {
1729
		kvm_state.hdr.svm.vmcb_pa = svm->nested.vmcb12_gpa;
1730
		kvm_state.size += KVM_STATE_NESTED_SVM_VMCB_SIZE;
1731
		kvm_state.flags |= KVM_STATE_NESTED_GUEST_MODE;
1732

1733
		if (svm->nested.nested_run_pending)
1734
			kvm_state.flags |= KVM_STATE_NESTED_RUN_PENDING;
1735
	}
1736

1737
	if (gif_set(svm))
1738
		kvm_state.flags |= KVM_STATE_NESTED_GIF_SET;
1739

1740
	if (copy_to_user(user_kvm_nested_state, &kvm_state, sizeof(kvm_state)))
1741
		return -EFAULT;
1742

1743
	if (!is_guest_mode(vcpu))
1744
		goto out;
1745

1746
	/*
1747
	 * Copy over the full size of the VMCB rather than just the size
1748
	 * of the structs.
1749
	 */
1750
	if (clear_user(user_vmcb, KVM_STATE_NESTED_SVM_VMCB_SIZE))
1751
		return -EFAULT;
1752

1753
	ctl = kzalloc(sizeof(*ctl), GFP_KERNEL);
1754
	if (!ctl)
1755
		return -ENOMEM;
1756

1757
	nested_copy_vmcb_cache_to_control(ctl, &svm->nested.ctl);
1758
	r = copy_to_user(&user_vmcb->control, ctl,
1759
			 sizeof(user_vmcb->control));
1760
	kfree(ctl);
1761
	if (r)
1762
		return -EFAULT;
1763

1764
	if (copy_to_user(&user_vmcb->save, &svm->vmcb01.ptr->save,
1765
			 sizeof(user_vmcb->save)))
1766
		return -EFAULT;
1767
out:
1768
	return kvm_state.size;
1769
}
1770

1771
static int svm_set_nested_state(struct kvm_vcpu *vcpu,
1772
				struct kvm_nested_state __user *user_kvm_nested_state,
1773
				struct kvm_nested_state *kvm_state)
1774
{
1775
	struct vcpu_svm *svm = to_svm(vcpu);
1776
	struct vmcb __user *user_vmcb = (struct vmcb __user *)
1777
		&user_kvm_nested_state->data.svm[0];
1778
	struct vmcb_control_area *ctl;
1779
	struct vmcb_save_area *save;
1780
	struct vmcb_save_area_cached save_cached;
1781
	struct vmcb_ctrl_area_cached ctl_cached;
1782
	unsigned long cr0;
1783
	int ret;
1784

1785
	BUILD_BUG_ON(sizeof(struct vmcb_control_area) + sizeof(struct vmcb_save_area) >
1786
		     KVM_STATE_NESTED_SVM_VMCB_SIZE);
1787

1788
	if (kvm_state->format != KVM_STATE_NESTED_FORMAT_SVM)
1789
		return -EINVAL;
1790

1791
	if (kvm_state->flags & ~(KVM_STATE_NESTED_GUEST_MODE |
1792
				 KVM_STATE_NESTED_RUN_PENDING |
1793
				 KVM_STATE_NESTED_GIF_SET))
1794
		return -EINVAL;
1795

1796
	/*
1797
	 * If in guest mode, vcpu->arch.efer actually refers to the L2 guest's
1798
	 * EFER.SVME, but EFER.SVME still has to be 1 for VMRUN to succeed.
1799
	 */
1800
	if (!(vcpu->arch.efer & EFER_SVME)) {
1801
		/* GIF=1 and no guest mode are required if SVME=0.  */
1802
		if (kvm_state->flags != KVM_STATE_NESTED_GIF_SET)
1803
			return -EINVAL;
1804
	}
1805

1806
	/* SMM temporarily disables SVM, so we cannot be in guest mode.  */
1807
	if (is_smm(vcpu) && (kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE))
1808
		return -EINVAL;
1809

1810
	if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) {
1811
		svm_leave_nested(vcpu);
1812
		svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
1813
		return 0;
1814
	}
1815

1816
	if (!page_address_valid(vcpu, kvm_state->hdr.svm.vmcb_pa))
1817
		return -EINVAL;
1818
	if (kvm_state->size < sizeof(*kvm_state) + KVM_STATE_NESTED_SVM_VMCB_SIZE)
1819
		return -EINVAL;
1820

1821
	ctl = memdup_user(&user_vmcb->control, sizeof(*ctl));
1822
	if (IS_ERR(ctl))
1823
		return PTR_ERR(ctl);
1824

1825
	save = memdup_user(&user_vmcb->save, sizeof(*save));
1826
	if (IS_ERR(save)) {
1827
		kfree(ctl);
1828
		return PTR_ERR(save);
1829
	}
1830

1831
	ret = -EINVAL;
1832
	__nested_copy_vmcb_control_to_cache(vcpu, &ctl_cached, ctl);
1833
	if (!__nested_vmcb_check_controls(vcpu, &ctl_cached))
1834
		goto out_free;
1835

1836
	/*
1837
	 * Processor state contains L2 state.  Check that it is
1838
	 * valid for guest mode (see nested_vmcb_check_save).
1839
	 */
1840
	cr0 = kvm_read_cr0(vcpu);
1841
        if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW))
1842
		goto out_free;
1843

1844
	/*
1845
	 * Validate host state saved from before VMRUN (see
1846
	 * nested_svm_check_permissions).
1847
	 */
1848
	__nested_copy_vmcb_save_to_cache(&save_cached, save);
1849
	if (!(save->cr0 & X86_CR0_PG) ||
1850
	    !(save->cr0 & X86_CR0_PE) ||
1851
	    (save->rflags & X86_EFLAGS_VM) ||
1852
	    !__nested_vmcb_check_save(vcpu, &save_cached))
1853
		goto out_free;
1854

1855

1856
	/*
1857
	 * All checks done, we can enter guest mode. Userspace provides
1858
	 * vmcb12.control, which will be combined with L1 and stored into
1859
	 * vmcb02, and the L1 save state which we store in vmcb01.
1860
	 * L2 registers if needed are moved from the current VMCB to VMCB02.
1861
	 */
1862

1863
	if (is_guest_mode(vcpu))
1864
		svm_leave_nested(vcpu);
1865
	else
1866
		svm->nested.vmcb02.ptr->save = svm->vmcb01.ptr->save;
1867

1868
	svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
1869

1870
	svm->nested.nested_run_pending =
1871
		!!(kvm_state->flags & KVM_STATE_NESTED_RUN_PENDING);
1872

1873
	svm->nested.vmcb12_gpa = kvm_state->hdr.svm.vmcb_pa;
1874

1875
	svm_copy_vmrun_state(&svm->vmcb01.ptr->save, save);
1876
	nested_copy_vmcb_control_to_cache(svm, ctl);
1877

1878
	svm_switch_vmcb(svm, &svm->nested.vmcb02);
1879
	nested_vmcb02_prepare_control(svm, svm->vmcb->save.rip, svm->vmcb->save.cs.base);
1880

1881
	/*
1882
	 * While the nested guest CR3 is already checked and set by
1883
	 * KVM_SET_SREGS, it was set when nested state was yet loaded,
1884
	 * thus MMU might not be initialized correctly.
1885
	 * Set it again to fix this.
1886
	 */
1887

1888
	ret = nested_svm_load_cr3(&svm->vcpu, vcpu->arch.cr3,
1889
				  nested_npt_enabled(svm), false);
1890
	if (WARN_ON_ONCE(ret))
1891
		goto out_free;
1892

1893
	svm->nested.force_msr_bitmap_recalc = true;
1894

1895
	kvm_make_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu);
1896
	ret = 0;
1897
out_free:
1898
	kfree(save);
1899
	kfree(ctl);
1900

1901
	return ret;
1902
}
1903

1904
static bool svm_get_nested_state_pages(struct kvm_vcpu *vcpu)
1905
{
1906
	if (WARN_ON(!is_guest_mode(vcpu)))
1907
		return true;
1908

1909
	if (!vcpu->arch.pdptrs_from_userspace &&
1910
	    !nested_npt_enabled(to_svm(vcpu)) && is_pae_paging(vcpu))
1911
		/*
1912
		 * Reload the guest's PDPTRs since after a migration
1913
		 * the guest CR3 might be restored prior to setting the nested
1914
		 * state which can lead to a load of wrong PDPTRs.
1915
		 */
1916
		if (CC(!load_pdptrs(vcpu, vcpu->arch.cr3)))
1917
			return false;
1918

1919
	if (!nested_svm_merge_msrpm(vcpu)) {
1920
		vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1921
		vcpu->run->internal.suberror =
1922
			KVM_INTERNAL_ERROR_EMULATION;
1923
		vcpu->run->internal.ndata = 0;
1924
		return false;
1925
	}
1926

1927
	if (kvm_hv_verify_vp_assist(vcpu))
1928
		return false;
1929

1930
	return true;
1931
}
1932

1933
struct kvm_x86_nested_ops svm_nested_ops = {
1934
	.leave_nested = svm_leave_nested,
1935
	.is_exception_vmexit = nested_svm_is_exception_vmexit,
1936
	.check_events = svm_check_nested_events,
1937
	.triple_fault = nested_svm_triple_fault,
1938
	.get_nested_state_pages = svm_get_nested_state_pages,
1939
	.get_state = svm_get_nested_state,
1940
	.set_state = svm_set_nested_state,
1941
	.hv_inject_synthetic_vmexit_post_tlb_flush = svm_hv_inject_synthetic_vmexit_post_tlb_flush,
1942
};
1943

1944