1
// SPDX-License-Identifier: GPL-2.0-only
2
/*
3
 * Kernel-based Virtual Machine driver for Linux
4
 *
5
 * AMD SVM support
6
 *
7
 * Copyright (C) 2006 Qumranet, Inc.
8
 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
9
 *
10
 * Authors:
11
 *   Yaniv Kamay  <[email protected]>
12
 *   Avi Kivity   <[email protected]>
13
 */
14

15
#ifndef __SVM_SVM_H
16
#define __SVM_SVM_H
17

18
#include <linux/kvm_types.h>
19
#include <linux/kvm_host.h>
20
#include <linux/bits.h>
21

22
#include <asm/svm.h>
23
#include <asm/sev-common.h>
24

25
#include "cpuid.h"
26
#include "kvm_cache_regs.h"
27

28
/*
29
 * Helpers to convert to/from physical addresses for pages whose address is
30
 * consumed directly by hardware.  Even though it's a physical address, SVM
31
 * often restricts the address to the natural width, hence 'unsigned long'
32
 * instead of 'hpa_t'.
33
 */
34
static inline unsigned long __sme_page_pa(struct page *page)
35
{
36
	return __sme_set(page_to_pfn(page) << PAGE_SHIFT);
37
}
38

39
static inline struct page *__sme_pa_to_page(unsigned long pa)
40
{
41
	return pfn_to_page(__sme_clr(pa) >> PAGE_SHIFT);
42
}
43

44
#define	IOPM_SIZE PAGE_SIZE * 3
45
#define	MSRPM_SIZE PAGE_SIZE * 2
46

47
extern bool npt_enabled;
48
extern int nrips;
49
extern int vgif;
50
extern bool intercept_smi;
51
extern bool vnmi;
52
extern int lbrv;
53

54
extern int tsc_aux_uret_slot __ro_after_init;
55

56
extern struct kvm_x86_ops svm_x86_ops __initdata;
57

58
/*
59
 * Clean bits in VMCB.
60
 * VMCB_ALL_CLEAN_MASK might also need to
61
 * be updated if this enum is modified.
62
 */
63
enum {
64
	VMCB_INTERCEPTS, /* Intercept vectors, TSC offset,
65
			    pause filter count */
66
	VMCB_PERM_MAP,   /* IOPM Base and MSRPM Base */
67
	VMCB_ASID,	 /* ASID */
68
	VMCB_INTR,	 /* int_ctl, int_vector */
69
	VMCB_NPT,        /* npt_en, nCR3, gPAT */
70
	VMCB_CR,	 /* CR0, CR3, CR4, EFER */
71
	VMCB_DR,         /* DR6, DR7 */
72
	VMCB_DT,         /* GDT, IDT */
73
	VMCB_SEG,        /* CS, DS, SS, ES, CPL */
74
	VMCB_CR2,        /* CR2 only */
75
	VMCB_LBR,        /* DBGCTL, BR_FROM, BR_TO, LAST_EX_FROM, LAST_EX_TO */
76
	VMCB_AVIC,       /* AVIC APIC_BAR, AVIC APIC_BACKING_PAGE,
77
			  * AVIC PHYSICAL_TABLE pointer,
78
			  * AVIC LOGICAL_TABLE pointer
79
			  */
80
	VMCB_CET,	 /* S_CET, SSP, ISST_ADDR */
81
	VMCB_SW = 31,    /* Reserved for hypervisor/software use */
82
};
83

84
#define VMCB_ALL_CLEAN_MASK (					\
85
	(1U << VMCB_INTERCEPTS) | (1U << VMCB_PERM_MAP) |	\
86
	(1U << VMCB_ASID) | (1U << VMCB_INTR) |			\
87
	(1U << VMCB_NPT) | (1U << VMCB_CR) | (1U << VMCB_DR) |	\
88
	(1U << VMCB_DT) | (1U << VMCB_SEG) | (1U << VMCB_CR2) |	\
89
	(1U << VMCB_LBR) | (1U << VMCB_AVIC) | (1U << VMCB_CET) | \
90
	(1U << VMCB_SW))
91

92
/* TPR and CR2 are always written before VMRUN */
93
#define VMCB_ALWAYS_DIRTY_MASK	((1U << VMCB_INTR) | (1U << VMCB_CR2))
94

95
struct kvm_sev_info {
96
	bool active;		/* SEV enabled guest */
97
	bool es_active;		/* SEV-ES enabled guest */
98
	bool need_init;		/* waiting for SEV_INIT2 */
99
	unsigned int asid;	/* ASID used for this guest */
100
	unsigned int handle;	/* SEV firmware handle */
101
	int fd;			/* SEV device fd */
102
	unsigned long policy;
103
	unsigned long pages_locked; /* Number of pages locked */
104
	struct list_head regions_list;  /* List of registered regions */
105
	u64 ap_jump_table;	/* SEV-ES AP Jump Table address */
106
	u64 vmsa_features;
107
	u16 ghcb_version;	/* Highest guest GHCB protocol version allowed */
108
	struct kvm *enc_context_owner; /* Owner of copied encryption context */
109
	struct list_head mirror_vms; /* List of VMs mirroring */
110
	struct list_head mirror_entry; /* Use as a list entry of mirrors */
111
	struct misc_cg *misc_cg; /* For misc cgroup accounting */
112
	atomic_t migration_in_progress;
113
	void *snp_context;      /* SNP guest context page */
114
	void *guest_req_buf;    /* Bounce buffer for SNP Guest Request input */
115
	void *guest_resp_buf;   /* Bounce buffer for SNP Guest Request output */
116
	struct mutex guest_req_mutex; /* Must acquire before using bounce buffers */
117
	cpumask_var_t have_run_cpus; /* CPUs that have done VMRUN for this VM. */
118
};
119

120
#define SEV_POLICY_NODBG	BIT_ULL(0)
121
#define SNP_POLICY_DEBUG	BIT_ULL(19)
122

123
struct kvm_svm {
124
	struct kvm kvm;
125

126
	/* Struct members for AVIC */
127
	u32 avic_vm_id;
128
	u32 *avic_logical_id_table;
129
	u64 *avic_physical_id_table;
130
	struct hlist_node hnode;
131

132
	struct kvm_sev_info sev_info;
133
};
134

135
struct kvm_vcpu;
136

137
struct kvm_vmcb_info {
138
	struct vmcb *ptr;
139
	unsigned long pa;
140
	int cpu;
141
	uint64_t asid_generation;
142
};
143

144
struct vmcb_save_area_cached {
145
	u64 efer;
146
	u64 cr4;
147
	u64 cr3;
148
	u64 cr0;
149
	u64 dr7;
150
	u64 dr6;
151
};
152

153
struct vmcb_ctrl_area_cached {
154
	u32 intercepts[MAX_INTERCEPT];
155
	u16 pause_filter_thresh;
156
	u16 pause_filter_count;
157
	u64 iopm_base_pa;
158
	u64 msrpm_base_pa;
159
	u64 tsc_offset;
160
	u32 asid;
161
	u8 tlb_ctl;
162
	u32 int_ctl;
163
	u32 int_vector;
164
	u32 int_state;
165
	u32 exit_code;
166
	u32 exit_code_hi;
167
	u64 exit_info_1;
168
	u64 exit_info_2;
169
	u32 exit_int_info;
170
	u32 exit_int_info_err;
171
	u64 nested_ctl;
172
	u32 event_inj;
173
	u32 event_inj_err;
174
	u64 next_rip;
175
	u64 nested_cr3;
176
	u64 virt_ext;
177
	u32 clean;
178
	u64 bus_lock_rip;
179
	union {
180
#if IS_ENABLED(CONFIG_HYPERV) || IS_ENABLED(CONFIG_KVM_HYPERV)
181
		struct hv_vmcb_enlightenments hv_enlightenments;
182
#endif
183
		u8 reserved_sw[32];
184
	};
185
};
186

187
struct svm_nested_state {
188
	struct kvm_vmcb_info vmcb02;
189
	u64 hsave_msr;
190
	u64 vm_cr_msr;
191
	u64 vmcb12_gpa;
192
	u64 last_vmcb12_gpa;
193

194
	/*
195
	 * The MSR permissions map used for vmcb02, which is the merge result
196
	 * of vmcb01 and vmcb12
197
	 */
198
	void *msrpm;
199

200
	/* A VMRUN has started but has not yet been performed, so
201
	 * we cannot inject a nested vmexit yet.  */
202
	bool nested_run_pending;
203

204
	/* cache for control fields of the guest */
205
	struct vmcb_ctrl_area_cached ctl;
206

207
	/*
208
	 * Note: this struct is not kept up-to-date while L2 runs; it is only
209
	 * valid within nested_svm_vmrun.
210
	 */
211
	struct vmcb_save_area_cached save;
212

213
	bool initialized;
214

215
	/*
216
	 * Indicates whether MSR bitmap for L2 needs to be rebuilt due to
217
	 * changes in MSR bitmap for L1 or switching to a different L2. Note,
218
	 * this flag can only be used reliably in conjunction with a paravirt L1
219
	 * which informs L0 whether any changes to MSR bitmap for L2 were done
220
	 * on its side.
221
	 */
222
	bool force_msr_bitmap_recalc;
223
};
224

225
struct vcpu_sev_es_state {
226
	/* SEV-ES support */
227
	struct sev_es_save_area *vmsa;
228
	struct ghcb *ghcb;
229
	u8 valid_bitmap[16];
230
	struct kvm_host_map ghcb_map;
231
	bool received_first_sipi;
232
	unsigned int ap_reset_hold_type;
233

234
	/* SEV-ES scratch area support */
235
	u64 sw_scratch;
236
	void *ghcb_sa;
237
	u32 ghcb_sa_len;
238
	bool ghcb_sa_sync;
239
	bool ghcb_sa_free;
240

241
	/* SNP Page-State-Change buffer entries currently being processed */
242
	u16 psc_idx;
243
	u16 psc_inflight;
244
	bool psc_2m;
245

246
	u64 ghcb_registered_gpa;
247

248
	struct mutex snp_vmsa_mutex; /* Used to handle concurrent updates of VMSA. */
249
	gpa_t snp_vmsa_gpa;
250
	bool snp_ap_waiting_for_reset;
251
	bool snp_has_guest_vmsa;
252
};
253

254
struct vcpu_svm {
255
	struct kvm_vcpu vcpu;
256
	/* vmcb always points at current_vmcb->ptr, it's purely a shorthand. */
257
	struct vmcb *vmcb;
258
	struct kvm_vmcb_info vmcb01;
259
	struct kvm_vmcb_info *current_vmcb;
260
	u32 asid;
261
	u32 sysenter_esp_hi;
262
	u32 sysenter_eip_hi;
263
	uint64_t tsc_aux;
264

265
	u64 msr_decfg;
266

267
	u64 next_rip;
268

269
	u64 spec_ctrl;
270

271
	u64 tsc_ratio_msr;
272
	/*
273
	 * Contains guest-controlled bits of VIRT_SPEC_CTRL, which will be
274
	 * translated into the appropriate L2_CFG bits on the host to
275
	 * perform speculative control.
276
	 */
277
	u64 virt_spec_ctrl;
278

279
	void *msrpm;
280

281
	ulong nmi_iret_rip;
282

283
	struct svm_nested_state nested;
284

285
	/* NMI mask value, used when vNMI is not enabled */
286
	bool nmi_masked;
287

288
	/*
289
	 * True when NMIs are still masked but guest IRET was just intercepted
290
	 * and KVM is waiting for RIP to change, which will signal that the
291
	 * intercepted IRET was retired and thus NMI can be unmasked.
292
	 */
293
	bool awaiting_iret_completion;
294

295
	/*
296
	 * Set when KVM is awaiting IRET completion and needs to inject NMIs as
297
	 * soon as the IRET completes (e.g. NMI is pending injection).  KVM
298
	 * temporarily steals RFLAGS.TF to single-step the guest in this case
299
	 * in order to regain control as soon as the NMI-blocking condition
300
	 * goes away.
301
	 */
302
	bool nmi_singlestep;
303
	u64 nmi_singlestep_guest_rflags;
304

305
	bool nmi_l1_to_l2;
306

307
	unsigned long soft_int_csbase;
308
	unsigned long soft_int_old_rip;
309
	unsigned long soft_int_next_rip;
310
	bool soft_int_injected;
311

312
	u32 ldr_reg;
313
	u32 dfr_reg;
314

315
	/* This is essentially a shadow of the vCPU's actual entry in the
316
	 * Physical ID table that is programmed into the VMCB, i.e. that is
317
	 * seen by the CPU.  If IPI virtualization is disabled, IsRunning is
318
	 * only ever set in the shadow, i.e. is never propagated to the "real"
319
	 * table, so that hardware never sees IsRunning=1.
320
	 */
321
	u64 avic_physical_id_entry;
322

323
	/*
324
	 * Per-vCPU list of irqfds that are eligible to post IRQs directly to
325
	 * the vCPU (a.k.a. device posted IRQs, a.k.a. IRQ bypass).  The list
326
	 * is used to reconfigure IRTEs when the vCPU is loaded/put (to set the
327
	 * target pCPU), when AVIC is toggled on/off (to (de)activate bypass),
328
	 * and if the irqfd becomes ineligible for posting (to put the IRTE
329
	 * back into remapped mode).
330
	 */
331
	struct list_head ir_list;
332
	spinlock_t ir_list_lock;
333

334
	struct vcpu_sev_es_state sev_es;
335

336
	bool guest_state_loaded;
337

338
	bool x2avic_msrs_intercepted;
339

340
	/* Guest GIF value, used when vGIF is not enabled */
341
	bool guest_gif;
342
};
343

344
struct svm_cpu_data {
345
	u64 asid_generation;
346
	u32 max_asid;
347
	u32 next_asid;
348
	u32 min_asid;
349

350
	bool bp_spec_reduce_set;
351

352
	struct vmcb *save_area;
353
	unsigned long save_area_pa;
354

355
	/* index = sev_asid, value = vmcb pointer */
356
	struct vmcb **sev_vmcbs;
357
};
358

359
DECLARE_PER_CPU(struct svm_cpu_data, svm_data);
360

361
void recalc_intercepts(struct vcpu_svm *svm);
362

363
static __always_inline struct kvm_svm *to_kvm_svm(struct kvm *kvm)
364
{
365
	return container_of(kvm, struct kvm_svm, kvm);
366
}
367

368
static __always_inline struct kvm_sev_info *to_kvm_sev_info(struct kvm *kvm)
369
{
370
	return &to_kvm_svm(kvm)->sev_info;
371
}
372

373
#ifdef CONFIG_KVM_AMD_SEV
374
static __always_inline bool sev_guest(struct kvm *kvm)
375
{
376
	return to_kvm_sev_info(kvm)->active;
377
}
378
static __always_inline bool sev_es_guest(struct kvm *kvm)
379
{
380
	struct kvm_sev_info *sev = to_kvm_sev_info(kvm);
381

382
	return sev->es_active && !WARN_ON_ONCE(!sev->active);
383
}
384

385
static __always_inline bool sev_snp_guest(struct kvm *kvm)
386
{
387
	struct kvm_sev_info *sev = to_kvm_sev_info(kvm);
388

389
	return (sev->vmsa_features & SVM_SEV_FEAT_SNP_ACTIVE) &&
390
	       !WARN_ON_ONCE(!sev_es_guest(kvm));
391
}
392
#else
393
#define sev_guest(kvm) false
394
#define sev_es_guest(kvm) false
395
#define sev_snp_guest(kvm) false
396
#endif
397

398
static inline bool ghcb_gpa_is_registered(struct vcpu_svm *svm, u64 val)
399
{
400
	return svm->sev_es.ghcb_registered_gpa == val;
401
}
402

403
static inline void vmcb_mark_all_dirty(struct vmcb *vmcb)
404
{
405
	vmcb->control.clean = 0;
406
}
407

408
static inline void vmcb_mark_all_clean(struct vmcb *vmcb)
409
{
410
	vmcb->control.clean = VMCB_ALL_CLEAN_MASK
411
			       & ~VMCB_ALWAYS_DIRTY_MASK;
412
}
413

414
static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit)
415
{
416
	vmcb->control.clean &= ~(1 << bit);
417
}
418

419
static inline bool vmcb_is_dirty(struct vmcb *vmcb, int bit)
420
{
421
        return !test_bit(bit, (unsigned long *)&vmcb->control.clean);
422
}
423

424
static __always_inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
425
{
426
	return container_of(vcpu, struct vcpu_svm, vcpu);
427
}
428

429
/*
430
 * Only the PDPTRs are loaded on demand into the shadow MMU.  All other
431
 * fields are synchronized on VM-Exit, because accessing the VMCB is cheap.
432
 *
433
 * CR3 might be out of date in the VMCB but it is not marked dirty; instead,
434
 * KVM_REQ_LOAD_MMU_PGD is always requested when the cached vcpu->arch.cr3
435
 * is changed.  svm_load_mmu_pgd() then syncs the new CR3 value into the VMCB.
436
 */
437
#define SVM_REGS_LAZY_LOAD_SET	(1 << VCPU_EXREG_PDPTR)
438

439
static inline void vmcb_set_intercept(struct vmcb_control_area *control, u32 bit)
440
{
441
	WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
442
	__set_bit(bit, (unsigned long *)&control->intercepts);
443
}
444

445
static inline void vmcb_clr_intercept(struct vmcb_control_area *control, u32 bit)
446
{
447
	WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
448
	__clear_bit(bit, (unsigned long *)&control->intercepts);
449
}
450

451
static inline bool vmcb_is_intercept(struct vmcb_control_area *control, u32 bit)
452
{
453
	WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
454
	return test_bit(bit, (unsigned long *)&control->intercepts);
455
}
456

457
static inline bool vmcb12_is_intercept(struct vmcb_ctrl_area_cached *control, u32 bit)
458
{
459
	WARN_ON_ONCE(bit >= 32 * MAX_INTERCEPT);
460
	return test_bit(bit, (unsigned long *)&control->intercepts);
461
}
462

463
static inline void set_exception_intercept(struct vcpu_svm *svm, u32 bit)
464
{
465
	struct vmcb *vmcb = svm->vmcb01.ptr;
466

467
	WARN_ON_ONCE(bit >= 32);
468
	vmcb_set_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit);
469

470
	recalc_intercepts(svm);
471
}
472

473
static inline void clr_exception_intercept(struct vcpu_svm *svm, u32 bit)
474
{
475
	struct vmcb *vmcb = svm->vmcb01.ptr;
476

477
	WARN_ON_ONCE(bit >= 32);
478
	vmcb_clr_intercept(&vmcb->control, INTERCEPT_EXCEPTION_OFFSET + bit);
479

480
	recalc_intercepts(svm);
481
}
482

483
static inline void svm_set_intercept(struct vcpu_svm *svm, int bit)
484
{
485
	struct vmcb *vmcb = svm->vmcb01.ptr;
486

487
	vmcb_set_intercept(&vmcb->control, bit);
488

489
	recalc_intercepts(svm);
490
}
491

492
static inline void svm_clr_intercept(struct vcpu_svm *svm, int bit)
493
{
494
	struct vmcb *vmcb = svm->vmcb01.ptr;
495

496
	vmcb_clr_intercept(&vmcb->control, bit);
497

498
	recalc_intercepts(svm);
499
}
500

501
static inline bool svm_is_intercept(struct vcpu_svm *svm, int bit)
502
{
503
	return vmcb_is_intercept(&svm->vmcb->control, bit);
504
}
505

506
static inline bool nested_vgif_enabled(struct vcpu_svm *svm)
507
{
508
	return guest_cpu_cap_has(&svm->vcpu, X86_FEATURE_VGIF) &&
509
	       (svm->nested.ctl.int_ctl & V_GIF_ENABLE_MASK);
510
}
511

512
static inline struct vmcb *get_vgif_vmcb(struct vcpu_svm *svm)
513
{
514
	if (!vgif)
515
		return NULL;
516

517
	if (is_guest_mode(&svm->vcpu) && !nested_vgif_enabled(svm))
518
		return svm->nested.vmcb02.ptr;
519
	else
520
		return svm->vmcb01.ptr;
521
}
522

523
static inline void enable_gif(struct vcpu_svm *svm)
524
{
525
	struct vmcb *vmcb = get_vgif_vmcb(svm);
526

527
	if (vmcb)
528
		vmcb->control.int_ctl |= V_GIF_MASK;
529
	else
530
		svm->guest_gif = true;
531
}
532

533
static inline void disable_gif(struct vcpu_svm *svm)
534
{
535
	struct vmcb *vmcb = get_vgif_vmcb(svm);
536

537
	if (vmcb)
538
		vmcb->control.int_ctl &= ~V_GIF_MASK;
539
	else
540
		svm->guest_gif = false;
541
}
542

543
static inline bool gif_set(struct vcpu_svm *svm)
544
{
545
	struct vmcb *vmcb = get_vgif_vmcb(svm);
546

547
	if (vmcb)
548
		return !!(vmcb->control.int_ctl & V_GIF_MASK);
549
	else
550
		return svm->guest_gif;
551
}
552

553
static inline bool nested_npt_enabled(struct vcpu_svm *svm)
554
{
555
	return svm->nested.ctl.nested_ctl & SVM_NESTED_CTL_NP_ENABLE;
556
}
557

558
static inline bool nested_vnmi_enabled(struct vcpu_svm *svm)
559
{
560
	return guest_cpu_cap_has(&svm->vcpu, X86_FEATURE_VNMI) &&
561
	       (svm->nested.ctl.int_ctl & V_NMI_ENABLE_MASK);
562
}
563

564
static inline bool is_x2apic_msrpm_offset(u32 offset)
565
{
566
	/* 4 msrs per u8, and 4 u8 in u32 */
567
	u32 msr = offset * 16;
568

569
	return (msr >= APIC_BASE_MSR) &&
570
	       (msr < (APIC_BASE_MSR + 0x100));
571
}
572

573
static inline struct vmcb *get_vnmi_vmcb_l1(struct vcpu_svm *svm)
574
{
575
	if (!vnmi)
576
		return NULL;
577

578
	if (is_guest_mode(&svm->vcpu))
579
		return NULL;
580
	else
581
		return svm->vmcb01.ptr;
582
}
583

584
static inline bool is_vnmi_enabled(struct vcpu_svm *svm)
585
{
586
	struct vmcb *vmcb = get_vnmi_vmcb_l1(svm);
587

588
	if (vmcb)
589
		return !!(vmcb->control.int_ctl & V_NMI_ENABLE_MASK);
590
	else
591
		return false;
592
}
593

594
static inline void svm_vmgexit_set_return_code(struct vcpu_svm *svm,
595
						u64 response, u64 data)
596
{
597
	ghcb_set_sw_exit_info_1(svm->sev_es.ghcb, response);
598
	ghcb_set_sw_exit_info_2(svm->sev_es.ghcb, data);
599
}
600

601
static inline void svm_vmgexit_inject_exception(struct vcpu_svm *svm, u8 vector)
602
{
603
	u64 data = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_EXEPT | vector;
604

605
	svm_vmgexit_set_return_code(svm, GHCB_HV_RESP_ISSUE_EXCEPTION, data);
606
}
607

608
static inline void svm_vmgexit_bad_input(struct vcpu_svm *svm, u64 suberror)
609
{
610
	svm_vmgexit_set_return_code(svm, GHCB_HV_RESP_MALFORMED_INPUT, suberror);
611
}
612

613
static inline void svm_vmgexit_success(struct vcpu_svm *svm, u64 data)
614
{
615
	svm_vmgexit_set_return_code(svm, GHCB_HV_RESP_NO_ACTION, data);
616
}
617

618
static inline void svm_vmgexit_no_action(struct vcpu_svm *svm, u64 data)
619
{
620
	svm_vmgexit_set_return_code(svm, GHCB_HV_RESP_NO_ACTION, data);
621
}
622

623
/*
624
 * The MSRPM is 8KiB in size, divided into four 2KiB ranges (the fourth range
625
 * is reserved).  Each MSR within a range is covered by two bits, one each for
626
 * read (bit 0) and write (bit 1), where a bit value of '1' means intercepted.
627
 */
628
#define SVM_MSRPM_BYTES_PER_RANGE 2048
629
#define SVM_BITS_PER_MSR 2
630
#define SVM_MSRS_PER_BYTE (BITS_PER_BYTE / SVM_BITS_PER_MSR)
631
#define SVM_MSRS_PER_RANGE (SVM_MSRPM_BYTES_PER_RANGE * SVM_MSRS_PER_BYTE)
632
static_assert(SVM_MSRS_PER_RANGE == 8192);
633
#define SVM_MSRPM_OFFSET_MASK (SVM_MSRS_PER_RANGE - 1)
634

635
static __always_inline int svm_msrpm_bit_nr(u32 msr)
636
{
637
	int range_nr;
638

639
	switch (msr & ~SVM_MSRPM_OFFSET_MASK) {
640
	case 0:
641
		range_nr = 0;
642
		break;
643
	case 0xc0000000:
644
		range_nr = 1;
645
		break;
646
	case 0xc0010000:
647
		range_nr = 2;
648
		break;
649
	default:
650
		return -EINVAL;
651
	}
652

653
	return range_nr * SVM_MSRPM_BYTES_PER_RANGE * BITS_PER_BYTE +
654
	       (msr & SVM_MSRPM_OFFSET_MASK) * SVM_BITS_PER_MSR;
655
}
656

657
#define __BUILD_SVM_MSR_BITMAP_HELPER(rtype, action, bitop, access, bit_rw)	\
658
static inline rtype svm_##action##_msr_bitmap_##access(unsigned long *bitmap,	\
659
						       u32 msr)			\
660
{										\
661
	int bit_nr;								\
662
										\
663
	bit_nr = svm_msrpm_bit_nr(msr);						\
664
	if (bit_nr < 0)								\
665
		return (rtype)true;						\
666
										\
667
	return bitop##_bit(bit_nr + bit_rw, bitmap);				\
668
}
669

670
#define BUILD_SVM_MSR_BITMAP_HELPERS(ret_type, action, bitop)			\
671
	__BUILD_SVM_MSR_BITMAP_HELPER(ret_type, action, bitop, read,  0)	\
672
	__BUILD_SVM_MSR_BITMAP_HELPER(ret_type, action, bitop, write, 1)
673

674
BUILD_SVM_MSR_BITMAP_HELPERS(bool, test, test)
675
BUILD_SVM_MSR_BITMAP_HELPERS(void, clear, __clear)
676
BUILD_SVM_MSR_BITMAP_HELPERS(void, set, __set)
677

678
#define DEBUGCTL_RESERVED_BITS (~DEBUGCTLMSR_LBR)
679

680
/* svm.c */
681
extern bool dump_invalid_vmcb;
682

683
void *svm_alloc_permissions_map(unsigned long size, gfp_t gfp_mask);
684

685
static inline void *svm_vcpu_alloc_msrpm(void)
686
{
687
	return svm_alloc_permissions_map(MSRPM_SIZE, GFP_KERNEL_ACCOUNT);
688
}
689

690
void svm_vcpu_free_msrpm(void *msrpm);
691
void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
692
void svm_enable_lbrv(struct kvm_vcpu *vcpu);
693
void svm_update_lbrv(struct kvm_vcpu *vcpu);
694

695
int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer);
696
void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
697
void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
698
void disable_nmi_singlestep(struct vcpu_svm *svm);
699
bool svm_smi_blocked(struct kvm_vcpu *vcpu);
700
bool svm_nmi_blocked(struct kvm_vcpu *vcpu);
701
bool svm_interrupt_blocked(struct kvm_vcpu *vcpu);
702
void svm_set_gif(struct vcpu_svm *svm, bool value);
703
int svm_invoke_exit_handler(struct kvm_vcpu *vcpu, u64 exit_code);
704
void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr,
705
			  int read, int write);
706
void svm_complete_interrupt_delivery(struct kvm_vcpu *vcpu, int delivery_mode,
707
				     int trig_mode, int vec);
708

709
void svm_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set);
710

711
static inline void svm_disable_intercept_for_msr(struct kvm_vcpu *vcpu,
712
						 u32 msr, int type)
713
{
714
	svm_set_intercept_for_msr(vcpu, msr, type, false);
715
}
716

717
static inline void svm_enable_intercept_for_msr(struct kvm_vcpu *vcpu,
718
						u32 msr, int type)
719
{
720
	svm_set_intercept_for_msr(vcpu, msr, type, true);
721
}
722

723
/* nested.c */
724

725
#define NESTED_EXIT_HOST	0	/* Exit handled on host level */
726
#define NESTED_EXIT_DONE	1	/* Exit caused nested vmexit  */
727
#define NESTED_EXIT_CONTINUE	2	/* Further checks needed      */
728

729
static inline bool nested_svm_virtualize_tpr(struct kvm_vcpu *vcpu)
730
{
731
	struct vcpu_svm *svm = to_svm(vcpu);
732

733
	return is_guest_mode(vcpu) && (svm->nested.ctl.int_ctl & V_INTR_MASKING_MASK);
734
}
735

736
static inline bool nested_exit_on_smi(struct vcpu_svm *svm)
737
{
738
	return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_SMI);
739
}
740

741
static inline bool nested_exit_on_intr(struct vcpu_svm *svm)
742
{
743
	return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_INTR);
744
}
745

746
static inline bool nested_exit_on_nmi(struct vcpu_svm *svm)
747
{
748
	return vmcb12_is_intercept(&svm->nested.ctl, INTERCEPT_NMI);
749
}
750

751
int __init nested_svm_init_msrpm_merge_offsets(void);
752

753
int enter_svm_guest_mode(struct kvm_vcpu *vcpu,
754
			 u64 vmcb_gpa, struct vmcb *vmcb12, bool from_vmrun);
755
void svm_leave_nested(struct kvm_vcpu *vcpu);
756
void svm_free_nested(struct vcpu_svm *svm);
757
int svm_allocate_nested(struct vcpu_svm *svm);
758
int nested_svm_vmrun(struct kvm_vcpu *vcpu);
759
void svm_copy_vmrun_state(struct vmcb_save_area *to_save,
760
			  struct vmcb_save_area *from_save);
761
void svm_copy_vmloadsave_state(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
762
int nested_svm_vmexit(struct vcpu_svm *svm);
763

764
static inline int nested_svm_simple_vmexit(struct vcpu_svm *svm, u32 exit_code)
765
{
766
	svm->vmcb->control.exit_code   = exit_code;
767
	svm->vmcb->control.exit_info_1 = 0;
768
	svm->vmcb->control.exit_info_2 = 0;
769
	return nested_svm_vmexit(svm);
770
}
771

772
int nested_svm_exit_handled(struct vcpu_svm *svm);
773
int nested_svm_check_permissions(struct kvm_vcpu *vcpu);
774
int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
775
			       bool has_error_code, u32 error_code);
776
int nested_svm_exit_special(struct vcpu_svm *svm);
777
void nested_svm_update_tsc_ratio_msr(struct kvm_vcpu *vcpu);
778
void svm_write_tsc_multiplier(struct kvm_vcpu *vcpu);
779
void nested_copy_vmcb_control_to_cache(struct vcpu_svm *svm,
780
				       struct vmcb_control_area *control);
781
void nested_copy_vmcb_save_to_cache(struct vcpu_svm *svm,
782
				    struct vmcb_save_area *save);
783
void nested_sync_control_from_vmcb02(struct vcpu_svm *svm);
784
void nested_vmcb02_compute_g_pat(struct vcpu_svm *svm);
785
void svm_switch_vmcb(struct vcpu_svm *svm, struct kvm_vmcb_info *target_vmcb);
786

787
extern struct kvm_x86_nested_ops svm_nested_ops;
788

789
/* avic.c */
790
#define AVIC_REQUIRED_APICV_INHIBITS			\
791
(							\
792
	BIT(APICV_INHIBIT_REASON_DISABLED) |		\
793
	BIT(APICV_INHIBIT_REASON_ABSENT) |		\
794
	BIT(APICV_INHIBIT_REASON_HYPERV) |		\
795
	BIT(APICV_INHIBIT_REASON_NESTED) |		\
796
	BIT(APICV_INHIBIT_REASON_IRQWIN) |		\
797
	BIT(APICV_INHIBIT_REASON_PIT_REINJ) |		\
798
	BIT(APICV_INHIBIT_REASON_BLOCKIRQ) |		\
799
	BIT(APICV_INHIBIT_REASON_SEV)      |		\
800
	BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED) |	\
801
	BIT(APICV_INHIBIT_REASON_APIC_ID_MODIFIED) |	\
802
	BIT(APICV_INHIBIT_REASON_APIC_BASE_MODIFIED) |	\
803
	BIT(APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED) |	\
804
	BIT(APICV_INHIBIT_REASON_PHYSICAL_ID_TOO_BIG)	\
805
)
806

807
bool __init avic_hardware_setup(void);
808
int avic_ga_log_notifier(u32 ga_tag);
809
void avic_vm_destroy(struct kvm *kvm);
810
int avic_vm_init(struct kvm *kvm);
811
void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb);
812
int avic_incomplete_ipi_interception(struct kvm_vcpu *vcpu);
813
int avic_unaccelerated_access_interception(struct kvm_vcpu *vcpu);
814
int avic_init_vcpu(struct vcpu_svm *svm);
815
void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
816
void avic_vcpu_put(struct kvm_vcpu *vcpu);
817
void avic_apicv_post_state_restore(struct kvm_vcpu *vcpu);
818
void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu);
819
int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
820
			unsigned int host_irq, uint32_t guest_irq,
821
			struct kvm_vcpu *vcpu, u32 vector);
822
void avic_vcpu_blocking(struct kvm_vcpu *vcpu);
823
void avic_vcpu_unblocking(struct kvm_vcpu *vcpu);
824
void avic_ring_doorbell(struct kvm_vcpu *vcpu);
825
unsigned long avic_vcpu_get_apicv_inhibit_reasons(struct kvm_vcpu *vcpu);
826
void avic_refresh_virtual_apic_mode(struct kvm_vcpu *vcpu);
827

828

829
/* sev.c */
830

831
int pre_sev_run(struct vcpu_svm *svm, int cpu);
832
void sev_init_vmcb(struct vcpu_svm *svm, bool init_event);
833
void sev_vcpu_after_set_cpuid(struct vcpu_svm *svm);
834
int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in);
835
void sev_es_recalc_msr_intercepts(struct kvm_vcpu *vcpu);
836
void sev_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
837
void sev_es_prepare_switch_to_guest(struct vcpu_svm *svm, struct sev_es_save_area *hostsa);
838
void sev_es_unmap_ghcb(struct vcpu_svm *svm);
839

840
#ifdef CONFIG_KVM_AMD_SEV
841
int sev_mem_enc_ioctl(struct kvm *kvm, void __user *argp);
842
int sev_mem_enc_register_region(struct kvm *kvm,
843
				struct kvm_enc_region *range);
844
int sev_mem_enc_unregister_region(struct kvm *kvm,
845
				  struct kvm_enc_region *range);
846
int sev_vm_copy_enc_context_from(struct kvm *kvm, unsigned int source_fd);
847
int sev_vm_move_enc_context_from(struct kvm *kvm, unsigned int source_fd);
848
void sev_guest_memory_reclaimed(struct kvm *kvm);
849
int sev_handle_vmgexit(struct kvm_vcpu *vcpu);
850

851
/* These symbols are used in common code and are stubbed below.  */
852

853
struct page *snp_safe_alloc_page_node(int node, gfp_t gfp);
854
static inline struct page *snp_safe_alloc_page(void)
855
{
856
	return snp_safe_alloc_page_node(numa_node_id(), GFP_KERNEL_ACCOUNT);
857
}
858

859
int sev_vcpu_create(struct kvm_vcpu *vcpu);
860
void sev_free_vcpu(struct kvm_vcpu *vcpu);
861
void sev_vm_destroy(struct kvm *kvm);
862
void __init sev_set_cpu_caps(void);
863
void __init sev_hardware_setup(void);
864
void sev_hardware_unsetup(void);
865
int sev_cpu_init(struct svm_cpu_data *sd);
866
int sev_dev_get_attr(u32 group, u64 attr, u64 *val);
867
extern unsigned int max_sev_asid;
868
void sev_handle_rmp_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code);
869
int sev_gmem_prepare(struct kvm *kvm, kvm_pfn_t pfn, gfn_t gfn, int max_order);
870
void sev_gmem_invalidate(kvm_pfn_t start, kvm_pfn_t end);
871
int sev_gmem_max_mapping_level(struct kvm *kvm, kvm_pfn_t pfn, bool is_private);
872
struct vmcb_save_area *sev_decrypt_vmsa(struct kvm_vcpu *vcpu);
873
void sev_free_decrypted_vmsa(struct kvm_vcpu *vcpu, struct vmcb_save_area *vmsa);
874
#else
875
static inline struct page *snp_safe_alloc_page_node(int node, gfp_t gfp)
876
{
877
	return alloc_pages_node(node, gfp | __GFP_ZERO, 0);
878
}
879

880
static inline struct page *snp_safe_alloc_page(void)
881
{
882
	return snp_safe_alloc_page_node(numa_node_id(), GFP_KERNEL_ACCOUNT);
883
}
884

885
static inline int sev_vcpu_create(struct kvm_vcpu *vcpu) { return 0; }
886
static inline void sev_free_vcpu(struct kvm_vcpu *vcpu) {}
887
static inline void sev_vm_destroy(struct kvm *kvm) {}
888
static inline void __init sev_set_cpu_caps(void) {}
889
static inline void __init sev_hardware_setup(void) {}
890
static inline void sev_hardware_unsetup(void) {}
891
static inline int sev_cpu_init(struct svm_cpu_data *sd) { return 0; }
892
static inline int sev_dev_get_attr(u32 group, u64 attr, u64 *val) { return -ENXIO; }
893
#define max_sev_asid 0
894
static inline void sev_handle_rmp_fault(struct kvm_vcpu *vcpu, gpa_t gpa, u64 error_code) {}
895
static inline int sev_gmem_prepare(struct kvm *kvm, kvm_pfn_t pfn, gfn_t gfn, int max_order)
896
{
897
	return 0;
898
}
899
static inline void sev_gmem_invalidate(kvm_pfn_t start, kvm_pfn_t end) {}
900
static inline int sev_gmem_max_mapping_level(struct kvm *kvm, kvm_pfn_t pfn, bool is_private)
901
{
902
	return 0;
903
}
904

905
static inline struct vmcb_save_area *sev_decrypt_vmsa(struct kvm_vcpu *vcpu)
906
{
907
	return NULL;
908
}
909
static inline void sev_free_decrypted_vmsa(struct kvm_vcpu *vcpu, struct vmcb_save_area *vmsa) {}
910
#endif
911

912
/* vmenter.S */
913

914
void __svm_sev_es_vcpu_run(struct vcpu_svm *svm, bool spec_ctrl_intercepted,
915
			   struct sev_es_save_area *hostsa);
916
void __svm_vcpu_run(struct vcpu_svm *svm, bool spec_ctrl_intercepted);
917

918
#define DEFINE_KVM_GHCB_ACCESSORS(field)						\
919
static __always_inline u64 kvm_ghcb_get_##field(struct vcpu_svm *svm)			\
920
{											\
921
	return READ_ONCE(svm->sev_es.ghcb->save.field);					\
922
}											\
923
											\
924
static __always_inline bool kvm_ghcb_##field##_is_valid(const struct vcpu_svm *svm)	\
925
{											\
926
	return test_bit(GHCB_BITMAP_IDX(field),						\
927
			(unsigned long *)&svm->sev_es.valid_bitmap);			\
928
}											\
929
											\
930
static __always_inline u64 kvm_ghcb_get_##field##_if_valid(struct vcpu_svm *svm)	\
931
{											\
932
	return kvm_ghcb_##field##_is_valid(svm) ? kvm_ghcb_get_##field(svm) : 0;	\
933
}
934

935
DEFINE_KVM_GHCB_ACCESSORS(cpl)
936
DEFINE_KVM_GHCB_ACCESSORS(rax)
937
DEFINE_KVM_GHCB_ACCESSORS(rcx)
938
DEFINE_KVM_GHCB_ACCESSORS(rdx)
939
DEFINE_KVM_GHCB_ACCESSORS(rbx)
940
DEFINE_KVM_GHCB_ACCESSORS(rsi)
941
DEFINE_KVM_GHCB_ACCESSORS(sw_exit_code)
942
DEFINE_KVM_GHCB_ACCESSORS(sw_exit_info_1)
943
DEFINE_KVM_GHCB_ACCESSORS(sw_exit_info_2)
944
DEFINE_KVM_GHCB_ACCESSORS(sw_scratch)
945
DEFINE_KVM_GHCB_ACCESSORS(xcr0)
946
DEFINE_KVM_GHCB_ACCESSORS(xss)
947

948
#endif
949

950