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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/bitfield.h>
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#include <linux/cleanup.h>
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#include <linux/dev_printk.h>
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#include <linux/string.h>
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#include <linux/string_choices.h>
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#include <linux/types.h>
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#include "core.h"
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#include "ref.h"
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/**
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 * zl3073x_ref_freq_factorize - factorize given frequency
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 * @freq: input frequency
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 * @base: base frequency
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 * @mult: multiplier
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 *
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 * Checks if the given frequency can be factorized using one of the
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 * supported base frequencies. If so the base frequency and multiplier
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 * are stored into appropriate parameters if they are not NULL.
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 *
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 * Return: 0 on success, -EINVAL if the frequency cannot be factorized
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 */
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int
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zl3073x_ref_freq_factorize(u32 freq, u16 *base, u16 *mult)
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{
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	static const u16 base_freqs[] = {
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		1, 2, 4, 5, 8, 10, 16, 20, 25, 32, 40, 50, 64, 80, 100, 125,
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		128, 160, 200, 250, 256, 320, 400, 500, 625, 640, 800, 1000,
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		1250, 1280, 1600, 2000, 2500, 3125, 3200, 4000, 5000, 6250,
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		6400, 8000, 10000, 12500, 15625, 16000, 20000, 25000, 31250,
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		32000, 40000, 50000, 62500,
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	};
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	u32 div;
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	int i;
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	for (i = 0; i < ARRAY_SIZE(base_freqs); i++) {
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		div = freq / base_freqs[i];
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		if (div <= U16_MAX && (freq % base_freqs[i]) == 0) {
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			if (base)
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				*base = base_freqs[i];
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			if (mult)
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				*mult = div;
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			return 0;
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		}
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	}
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	return -EINVAL;
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}
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/**
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 * zl3073x_ref_state_fetch - fetch input reference state from hardware
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 * @zldev: pointer to zl3073x_dev structure
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 * @index: input reference index to fetch state for
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 *
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 * Function fetches state for the given input reference from hardware and
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 * stores it for later use.
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 *
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 * Return: 0 on success, <0 on error
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 */
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int zl3073x_ref_state_fetch(struct zl3073x_dev *zldev, u8 index)
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{
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	struct zl3073x_ref *ref = &zldev->ref[index];
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	int rc;
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	/* For differential type inputs the N-pin reference shares
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	 * part of the configuration with the P-pin counterpart.
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	 */
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	if (zl3073x_is_n_pin(index) && zl3073x_ref_is_diff(ref - 1)) {
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		struct zl3073x_ref *p_ref = ref - 1; /* P-pin counterpart*/
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		/* Copy the shared items from the P-pin */
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		ref->config = p_ref->config;
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		ref->esync_n_div = p_ref->esync_n_div;
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		ref->freq_base = p_ref->freq_base;
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		ref->freq_mult = p_ref->freq_mult;
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		ref->freq_ratio_m = p_ref->freq_ratio_m;
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		ref->freq_ratio_n = p_ref->freq_ratio_n;
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		ref->phase_comp = p_ref->phase_comp;
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		ref->sync_ctrl = p_ref->sync_ctrl;
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		return 0; /* Finish - no non-shared items for now */
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	}
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	guard(mutex)(&zldev->multiop_lock);
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	/* Read reference configuration */
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	rc = zl3073x_mb_op(zldev, ZL_REG_REF_MB_SEM, ZL_REF_MB_SEM_RD,
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			   ZL_REG_REF_MB_MASK, BIT(index));
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	if (rc)
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		return rc;
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	/* Read ref_config register */
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	rc = zl3073x_read_u8(zldev, ZL_REG_REF_CONFIG, &ref->config);
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	if (rc)
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		return rc;
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	/* Read frequency related registers */
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	rc = zl3073x_read_u16(zldev, ZL_REG_REF_FREQ_BASE, &ref->freq_base);
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	if (rc)
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		return rc;
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	rc = zl3073x_read_u16(zldev, ZL_REG_REF_FREQ_MULT, &ref->freq_mult);
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	if (rc)
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		return rc;
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	rc = zl3073x_read_u16(zldev, ZL_REG_REF_RATIO_M, &ref->freq_ratio_m);
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	if (rc)
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		return rc;
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	rc = zl3073x_read_u16(zldev, ZL_REG_REF_RATIO_N, &ref->freq_ratio_n);
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	if (rc)
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		return rc;
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	/* Read eSync and N-div rated registers */
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	rc = zl3073x_read_u32(zldev, ZL_REG_REF_ESYNC_DIV, &ref->esync_n_div);
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	if (rc)
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		return rc;
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	rc = zl3073x_read_u8(zldev, ZL_REG_REF_SYNC_CTRL, &ref->sync_ctrl);
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	if (rc)
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		return rc;
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	/* Read phase compensation register */
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	if (zl3073x_dev_is_ref_phase_comp_32bit(zldev)) {
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		u32 val;
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		rc = zl3073x_read_u32(zldev, ZL_REG_REF_PHASE_OFFSET_COMP_32,
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				      &val);
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		ref->phase_comp = val;
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	} else {
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		rc = zl3073x_read_u48(zldev, ZL_REG_REF_PHASE_OFFSET_COMP,
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				      &ref->phase_comp);
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	}
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	if (rc)
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		return rc;
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	dev_dbg(zldev->dev, "REF%u is %s and configured as %s\n", index,
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		str_enabled_disabled(zl3073x_ref_is_enabled(ref)),
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		zl3073x_ref_is_diff(ref) ? "differential" : "single-ended");
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	return rc;
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}
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/**
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 * zl3073x_ref_state_get - get current input reference state
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 * @zldev: pointer to zl3073x_dev structure
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 * @index: input reference index to get state for
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 *
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 * Return: pointer to given input reference state
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 */
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const struct zl3073x_ref *
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zl3073x_ref_state_get(struct zl3073x_dev *zldev, u8 index)
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{
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	return &zldev->ref[index];
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}
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int zl3073x_ref_state_set(struct zl3073x_dev *zldev, u8 index,
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			  const struct zl3073x_ref *ref)
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{
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	struct zl3073x_ref *dref = &zldev->ref[index];
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	int rc;
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	guard(mutex)(&zldev->multiop_lock);
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	/* Read reference configuration into mailbox */
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	rc = zl3073x_mb_op(zldev, ZL_REG_REF_MB_SEM, ZL_REF_MB_SEM_RD,
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			   ZL_REG_REF_MB_MASK, BIT(index));
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	if (rc)
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		return rc;
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	/* Update mailbox with changed values */
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	if (dref->freq_base != ref->freq_base)
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		rc = zl3073x_write_u16(zldev, ZL_REG_REF_FREQ_BASE,
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				       ref->freq_base);
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	if (!rc && dref->freq_mult != ref->freq_mult)
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		rc = zl3073x_write_u16(zldev, ZL_REG_REF_FREQ_MULT,
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				       ref->freq_mult);
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	if (!rc && dref->freq_ratio_m != ref->freq_ratio_m)
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		rc = zl3073x_write_u16(zldev, ZL_REG_REF_RATIO_M,
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				       ref->freq_ratio_m);
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	if (!rc && dref->freq_ratio_n != ref->freq_ratio_n)
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		rc = zl3073x_write_u16(zldev, ZL_REG_REF_RATIO_N,
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				       ref->freq_ratio_n);
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	if (!rc && dref->esync_n_div != ref->esync_n_div)
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		rc = zl3073x_write_u32(zldev, ZL_REG_REF_ESYNC_DIV,
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				       ref->esync_n_div);
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	if (!rc && dref->sync_ctrl != ref->sync_ctrl)
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		rc = zl3073x_write_u8(zldev, ZL_REG_REF_SYNC_CTRL,
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				      ref->sync_ctrl);
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	if (!rc && dref->phase_comp != ref->phase_comp) {
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		if (zl3073x_dev_is_ref_phase_comp_32bit(zldev))
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			rc = zl3073x_write_u32(zldev,
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					       ZL_REG_REF_PHASE_OFFSET_COMP_32,
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					       ref->phase_comp);
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		else
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			rc = zl3073x_write_u48(zldev,
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					       ZL_REG_REF_PHASE_OFFSET_COMP,
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					       ref->phase_comp);
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	}
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	if (rc)
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		return rc;
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	/* Commit reference configuration */
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	rc = zl3073x_mb_op(zldev, ZL_REG_REF_MB_SEM, ZL_REF_MB_SEM_WR,
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			   ZL_REG_REF_MB_MASK, BIT(index));
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	if (rc)
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		return rc;
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	/* After successful commit store new state */
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	dref->freq_base = ref->freq_base;
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	dref->freq_mult = ref->freq_mult;
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	dref->freq_ratio_m = ref->freq_ratio_m;
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	dref->freq_ratio_n = ref->freq_ratio_n;
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	dref->esync_n_div = ref->esync_n_div;
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	dref->sync_ctrl = ref->sync_ctrl;
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	dref->phase_comp = ref->phase_comp;
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	return 0;
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}
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