Path: blob/master/tools/arch/x86/include/asm/special_insns.h
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/* SPDX-License-Identifier: GPL-2.0 */1#ifndef _TOOLS_ASM_X86_SPECIAL_INSNS_H2#define _TOOLS_ASM_X86_SPECIAL_INSNS_H34/* The dst parameter must be 64-bytes aligned */5static inline void movdir64b(void *dst, const void *src)6{7const struct { char _[64]; } *__src = src;8struct { char _[64]; } *__dst = dst;910/*11* MOVDIR64B %(rdx), rax.12*13* Both __src and __dst must be memory constraints in order to tell the14* compiler that no other memory accesses should be reordered around15* this one.16*17* Also, both must be supplied as lvalues because this tells18* the compiler what the object is (its size) the instruction accesses.19* I.e., not the pointers but what they point to, thus the deref'ing '*'.20*/21asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02"22: "+m" (*__dst)23: "m" (*__src), "a" (__dst), "d" (__src));24}2526#endif /* _TOOLS_ASM_X86_SPECIAL_INSNS_H */272829